The paper presents a new approach for bridging the gap between design and test of mixed signal cores. The proposed solution allows the direct application of the testbench used during the design validation to perform the automatic configuration of the test equipment and the Device Under Test interconnections. Furthermore, the solution also allows to control data acquisition and convert test data into a format compatible with the simulation tools. The main goal is to offer the designer the possibility to interact directly with the test process through the use of the same type of interfaces employed during design simulation, namely SPICE netlists and waveform viewers, thus avoiding the need of a deep knowledge in the test area.
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