Purpose The control of a quadrotor unmanned aerial vehicle (UAV) is a challenging problem because of its highly nonlinear dynamics, under-actuated nature and strong cross-couplings. To solve this problem, this paper aims to propose a robust control strategy, based on a concept of active disturbance rejection control (ADRC). Design/methodology/approach The altitude/attitude dynamics of a quadrotor is reformulated into the ADRC framework. Three distinct variations of the error-based ADRC algorithms, with different structures of generalized extended state observers (GESO), are derived for the altitude/attitude trajectory-following task. The convergence of the observation part is proved based on the singular perturbation theory. Through a frequency analysis and a quantitative comparison in a simulated environment, each design is shown to have certain advantages and disadvantages in terms of tracking accuracy and robustness. The digital prototypes of the proposed controllers for quadrotor altitude and attitude control channels are designed and validated through real-time hardware-in-the-loop (HIL) co-simulation, with field-programmable gate array (FPGA) hardware. Findings The effects of unavailable reference time-derivatives can be estimated by the ESO and rejected through the outer control loop. The higher order ESOs demonstrate better performances, but with reductions of stability margins. Time-domain simulation analysis reveals the benefits of the proposed control structure related to classical control approach. Real-time FPGA-based HIL co-simulations validated the performances of the considered digital controllers in typical quadrotor flight scenarios. Practical implications The conducted study forms a set of practical guidelines for end-users for selecting specific ADRC design for quadrotor control depending on the given control objective and work conditions. Furthermore, the paper presents detailed procedure for the design, simulation and validation of the embedded FPGA-based quadrotor control unit. Originality/value In light of the currently available literature on error-based ADRC, a comprehensive approach is applied here, which includes the design of error-based ADRC with different GESOs, its frequency-domain and time-domain analyses using different simulation of UAV flight scenarios, as well as its FPGA-based implementation and testing on the real hardware.

In this paper, the laser seeker control problem is solved in the framework of active disturbance rejection control (ADRC). The considered problem, which consists of laser seeker stabilisation and target tracking, is expressed here as a regulation problem. A nonlinear extended state observer (NESO) with varying gains is used to improve the performance of linear ESO (LESO), and thus enable better control performance in both transient period and steady-state, with lower control effort. Based on a detailed analysis of system disturbances, a special ADRC tuning method is proposed. The stability of the overall control structure is analysed with a description function method. Through comparative simulations LESO-based and the introduced NESO-based ADRC for the laser seeker system, the advantages of the proposed scheme are shown.

In this paper, we uncover a new connection between standard PI/PID controllers and active disturbance rejection control (ADRC), from which we establish formal conditions of equivalence between the two control schemes. Using the equivalence, we devise a stepby-step procedure of transitioning from PI/PID to error-based ADRC. We also show how to go from 1DOF to 2DOF ADRC while retaining a standard 2DOF PI/PID structure. Both procedures facilitate expressing error-based ADRC schemes as standard industrial 1DOF and 2DOF controllers. This allows the designed controller to have the desired characteristic of ADRC (i.e. strong robustness against internal and external uncertainties) while still being expressed in a form that is familiar to industrial practitioners, where PI/PID structures are still the workhorse of modern control systems. The results of the paper ensure backward compatibility of future ADRC-based solutions and foster the adoption of active disturbance rejection-based methods in industrial practice as a viable alternative to standard controllers. To further support the findings, a set of tests is conducted in time and frequency domain, followed by a comparative analysis in FPGAin-the-loop simulation utilizing a realistic plant model.