Contention-less flip-flops (CLFF's) and separated power supply voltages (V DD ) between flip-flops (FF's) and combinational logics are proposed to achieve a maximum energy efficiency operation. The proposed technologies were applied to a 16-bit integer unit (IU) for media processing in a 65-nm CMOS process. Measurement results of fabricated chips show that the proposed CLFF reduces the minimum operating voltage of IU's by 64mV on average. By scaling V DD from 1.2V to 310mV with the proposed CLFF, the maximum energy efficiency of 1835GOPS/W and the highest energy efficiency increase of 12.7 times are achieved.
Organic electronics is attracting a lot of attention for large-area pervasive electronics applications, because organic transistors can be fabricated using printing technologies on arbitrary substrates and this enables both high-throughput and low-cost production. In this paper, some examples of the large area electronics with the organic transistors including a wireless power transmission sheet and a communication sheet are presented. Challenges for future large area electronics are also described.
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