We proposed a new architecture for an FTC called QPR (Quad Processor Redundancy). Duplicated CPUs operate under a hardware lock step, and duplicated I/Os are managed by software. A dual system bus combines two duplicated areas.After recovery from a fault, it is necessaly to resynchronize the system, so the contents of the main memory must be copied from the normal CPU to the other CPU. The overhead for copying must be small, so that the normal CPU can still continue the application.In this paper, we describe a fault recovery method especially for a memory copying method. When a memoiy access has occurred, the memory intelface unit snoops the data and sends them to another CPU using the dual system bus. We measured copy time using the real machine and simulated the copy overhead under a heavy DMA load. We obtained a small overhead and small load dependency.The hardware FTC has redundant hardware and it automatically changes resources when a fault is detected. With this type of FTC, users are not concerned with applications for fault tolerance, or most parts of the OS. Then, it is easy to port standard OSs. But, the hardware FTC supports hot-plugging technology for non-stop repairing on all hardware modules, and has special redundant hardware which includes U 0 adapters. Then, it is difficult to use new technologies like general computers.We proposed a new architecture for the FTC called QPR (quad processor redundancy).[l][2] The QPR is a hybrid FTC which uses the merits of hardware and software ~C S . The QPR architecture combines two general purpose servers by using the dual system bus and some additional hardware. In this paper, we describe a new memory copy architecture required in fault recovery and its overhead evaluation.
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