Cancer is one of the leading causes of death worldwide. Early detection and prevention of cancer plays a very important role in reducing deaths caused by cancer. Identification of genetic and environmental factors is very important in developing novel methods to detect and prevent cancer. Therefore a novel multi layered method combining clustering and decision tree techniques to build a cancer risk prediction system is proposed here which predicts lung, breast, oral, cervix, stomach and blood cancers and is also user friendly, time and cost saving. This research uses data mining technology such as classification, clustering and prediction to identify potential cancer patients. The gathered data is preprocessed, fed into the database and classified to yield significant patterns using decision tree algorithm. Then the data is clustered using Kmeans clustering algorithm to separate cancer and non cancer patient data. Further the cancer cluster is subdivided into six clusters. Finally a prediction system is developed to analyze risk levels which help in prognosis. This research helps in detection of a person's predisposition for cancer before going for clinical and lab tests which is cost and time consuming.
SUMMARYBinary decision diagrams (BDDs) are the most frequently used data structure for the representation and handling of Boolean functions because of their excellent time and space efficiencies. In this article, a reversed BDD-based pass transistor logic (PTL) logic synthesis is presented for low-power and high-performance circuits without exploiting the canonical property of BDDs. The procedure of the reversed BDD transformation into PTL is achieved by a one-to-one correspondence with the BDD node and PTL cell. Layouts are generated for the benchmark circuits and simulated in terms of power dissipation, propagation delay and area. The reversed BDD technique performs better in terms of area, delay and power dissipation due to the regularity, a reduced critical path, less interconnection wires, a multiplexer-based construction of PTL circuits, and less switching activities.
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