This paper presents the design and implementation of an error detection service for multicore real-time invehicle embedded systems. The service aims at monitoring the data flows in a graph of communicating real-time tasks and detecting violation of the expected communication patterns. The service is not based on any specific system model. The monitors are automatically generated from formal models of the monitored system and the expected communication patterns. To minimize the time overhead of the service, the monitors are embedded in the RTOS kernel. The implementation targets an AUTOSAR-like platform based on the open-source RTOS Trampoline. Measures made on an ARM7 MCU show that the time and memory overheads are compatible with the stringent constraints of the application domain.
This article introduces STM-HRT, a nonblocking wait-free software transactional memory (STM) for hard real-time (HRT) multicore embedded systems. Resource access control in HRT systems is usually implemented with lock-based synchronization. However, these mechanisms may lead to deadlocks or starvations and do not scale well with the number of cores. Most existing nonblocking STM are not suitable for HRT systems, because it is not possible to find an upper bound of the execution time for each task. In this article, we show how STM-HRT can be a robust solution for resource sharing in HRT multicore systems. We provide a detailed description of STM-HRT architecture. We propose a set of arguments to establish the functional correctness of its concurrency control protocol. Finally, as part of a real-time analysis, we derive upper bounds on the computations required to access shared data under STM-HRT.
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