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In this paper, the complementary charge-plasma (CP) based symmetrical-gate electron-hole bilayer (EHB) Tunnel Field-Effect Transistor (TFET) at a low operating voltage (≤0.5V) is introduced. Where, by using CP technique, the source/drain & EHB-channel is induced by depositing metal electrode with appropriate work function. Moreover, the immunity against random dopant fluctuations and the feasibility of a self-aligned process due to a symmetrical top/bottom gate arrangement without the need for a high thermal annealing process make the fabrication of the proposed EHB-TFET very reliable and efficient. Moreover, by implementing the Density Gradient Quantum Correction Model, the quantum confinement and its effect on confining the 2D electron-hole concentration are also corrected as the proposed device has a smaller channel thickness of 5 nm. The proposed device shows superior performance against almost all Si-based CP-TFETs with a higher ON-current of 47.33μA/μm, a smaller average subthreshold swing of 13.53mV/dec and a high ON-current to OFF-current ratio of 2.16×1013. This indicates that the proposed device is a promising candidate for future low-power applications

This paper proposes the charge plasma based dual electrode doping-less tunnel FET (DEDLTFET). The paper compares the device performance of the conventional doping-less TFET (DLTFET) and doped TFET (DGTFET). DEDLTEFT gives the superior results with high ON state current (ION ∼ 0.56 mA/μm), ION/IOFF ratio ∼ 9.12 × 1013 and an average subthreshold swing (AV-SS ∼ 48 mV/dec). The variation of different device parameters such as channel length, gate oxide material, gate oxide thickness, silicon thickness, gate work function and temperature variation are done and compared with DLTFET and DGTFET. Through the extensive analysis it is found that DEDLTFET shows the better performance than the other two devices, which gives the indication for an excellent future in low power applications.

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