We
harness a synergy between morphology and the electromagnetic
response of semiconducting material to engineer the chiro-optical
properties of metamaterials that are active at ultraviolet (UV) wavelengths.
Chiral metamaterials have recently ushered in new research directions
in fundamental light–matter interactions, while simultaneously
opening a range of promising photonics-based applications from polarization
control to improved biosensing methods. Despite these recent advances,
to date, very little attention has been focused upon engineered large
UV–chiro-optical activity, where naturally occurring molecular
optical activity bands are most typically encountered. Here, we systematically
alter the morphology of titanium dioxide nanohelices, which make up
the elements of the chiral metamaterials, to investigate how the nanoparticle
shape affects chiro-optical activity across the UV spectrum. When
the nanoscale critical dimensions fall within a particular size range,
giant chiro-optical activity is observed, which is on the order of
the strongest demonstrated in the UV to date and can be tuned by slight
alterations of the nanohelices’ morphology.
COMMUNICATION
(1 of 7)Colloidal particles suspended in a fluid may become self-propelling when a catalyzed chemical reaction takes place at the interface between the particle and the fluid through which motion occurs. [1][2][3][4][5][6][7][8][9] If this reaction generates a local concentration gradient, [10] a chemiosmotic flow [11] over the particle's surface may arise. Such fluid flow is usually responsible for self-propulsion. This way of achieving active nano-and microscale autonomous motion is attractive since external fields, such as electric, [12] magnetic, [13][14][15][16][17][18] light, [19] or acoustic, [20,21] do not need to be applied, and moreover, nonequilibrium self-propelled systems
Semiconductor logic and memory technology development continues to push the limits of process complexity and cost, especially as the industry migrates to the 5 nm node and beyond. Optimization of the process flow and ultimately quantifying its physical and electrical properties are critical steps in yielding mature technology. The standard build, test, and wait model of technology development is a major contributor to time and cost overruns. The growing inability to characterize many of the subtle and complicated features and yield limiting factors of a given technology is another serious constraint. We demonstrate the use of process modeling, virtual wafer fabrication, and virtual metrology in process development of advanced logic and memory. Accurate and predictive process modeling, in combination with virtual metrology enables the characterization of any feature on any given structure, is becoming a key requirement in advanced technology development. Virtual fabrication also accelerates the semiconductor development cycle, by substituting limited and lengthy wafer-based experiments with fast, large-scale virtual design of experiment. Several applications of virtual process modeling and metrology are illustrated in 3D NAND, DRAM, and logic technology. These applications include studies of 3D NAND pillar etch alignment (including tilt, twist, and bowing), DRAM capacitor process window optimization, advanced FinFET logic pitch-walking, and BEOL performance optimization.
In this study, a direct-grown helical-shaped tungsten-oxide-based (h-WOx) selection device is presented for emerging memory applications. The selectivity in the selection devices is from 10 to 103 with a low off-current of 0.1 to 0.01 nA. In addition, the selectivity of volatile switching in the h-WOx selection devices is reconfigurable with a pseudo RESET process on the one-time negative voltage operations. The helical-shaped selection devices with the glancing angle deposition (GLAD) method show good compatibility, low power consumption, good selectivity, and good reconfigurability for next-generation memory applications.
The dual functions of nano helical-shaped memory have
been presented:
i.e., nonvolatile switching (NVS) and volatile switching (VS). The
selectivity of volatile switching devices can be integrated as a selector
device in a memory application. Meanwhile, the device’s nonvolatile
switching behavior has been shown as a self-selective characteristic
for suppressing the sneak path current in the high-density memory
array without switch device integration. The highly CMOS compatible
materials have been investigated and presented in this work as candidates
for embedded memory and selectors in future computational applications.
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