INTRODUCTION:The quantity of audio and visual data is increasing exponentially due to the internet's rapid growth. The digital information in images and videos could be used for fully automated captions, indexing, and image structuring. The online image and video data system has seen a significant increase. In such a dataset, images and videos must be retrieved, explored, as well as inspected. OBJECTIVES: Text extraction is crucial for locating critical as well as important data. Disturbance is indeed a critical factor that affects image quality, and this is primarily generated during image acquisition and communication operations. An image can be contaminated by a variety of noise-type disturbances. A text in the complex image includes a variety of information which is used to recognise textual as well as non-textual particulars. The particulars in the complicated corrupted images have been considered important for individuals seeing the entire issue. However, text in complicated degraded images exhibits a rapidly changing form in an unconstrained circumstance, making textual data recognition complicated METHODS: The naïve bayes algorithm is a weighted reading technique is used to generate the correct text data from the complicated image regions. Usually, images hold some disturbance as a result of the fact that filtration is proposed during the early pre-processing step. To restore the image's quality, the input image is processed employing gradient and contrast image methods. Following that, the contrast of the source images would be enhanced using an adaptive image map. Stroke width transform, Gabor transform, and weighted naïve bayes classifier methodologies have been used in complicated degraded images to segment, features extraction, and detect textual and non-textual elements. RESULTS: Finally, to identify categorised textual data, the confluence of deep neural networks and particle swarm optimization is being used. The dataset IIIT5K is used for the development portion, and also the performance of the suggested methodology is assessed by utilizing parameters like as accuracy, recall, precision, and F1 score. It performs well enough for record collections such as articles, even when significantly distorted, and is thus suitable for creating library information system databases CONCLUSION: A combination of deep neural network and particle swarm optimization is being used to recognise classified text. The dataset IIIT5K is used for the development portion, and while high performance is achieved with parameters such as accuracy, recall, precision, and F1 score, characters may occasionally deviate. Alternatively, the same character is frequently extracted [3] multiple times, which may result in incorrect textual data being extracted from natural images. As a result, an efficient technique for avoiding such flaws in the text retrieval process must be implemented in the near future.
In this paper, a novel delta-doped N + Silicon-Germanium Gate Stacked Triple Metal Gate Vertical TFET (Delta doped N + GS TMG VTFET) is proposed and investigated using the Silvaco TCAD simulation tool. Four different combinations were presented and compared with and without the gate stacking method and Si0.2Ge0.8 N + pocket delta-doped layer to render the optimized results. Among all, Delta doped N + GS TMG VTFET structure comes out with a very steep sub-threshold slope (9.75 mV/dec), 40 % lower than the first configuration of TMG VTFET. The inclusion of the N + delta-doped layer between the source and channel and gate will enhance the ON-state drive current performance by reducing the OFF-state leakage current. This happens due to the lower bandgap of the N + delta-doped layer cause narrow BTBT, which results in a high drive current. The Triple metal gate is designed to mitigate the ambipolar conduction by modulating the optimized wok function at 4.15, 4.3, and 4.15 eV. The distribution of the source channel in the vertical structure will enhance the device's scalability due to the electron tunneling moves in the vertical electric field direction. The optimally constructed structure demonstrates improved performance, such as a high ION/IOFF current ratio (~ 1013) and sub-threshold voltage (0.33 V). The results obtained from the proposed device make it suitable for the ultra-low-power device application.
As CMOS technology shrinks to the deep submicron range, increased power dissipation becomes a big issue. Due to its non-volatility, fast speed, great durability, CMOS compatibility, and low power consumption, the Spin transfer torque (STT) switching mechanism based on Magnetic tunnel Junction (MTJ) is widely regarded as one of the most promising spintronic devices for the post-CMOS era. The research presented here proposes a novel Arithmetic Logic Unit (ALU) that makes use of Spin Hall Effect (SHE) to aid with STT/ MTJ. In this study, we use SHE-assisted STT logic to create a Hybrid Full Adder and three other logics (AND, OR, and XOR). The proposed logics are then used to create an adder circuit, which is used to create an Arithmetic Logic Unit (ALU). A comparison of each of the proposed designs to the DPT L − C 2 MOS − ALU and P-MALU has been performed. The simulation findings show that the proposed designs outperform competing ALU designs, with a 28% reduction in power consumption and a corresponding reduction in latency. For circuit simulation in 45nm technology, the Cadence Virtuoso tool is employed.
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