Real-time target tracking in large disparate sensor networks has been simulated with a parallelized search based data fusion algorithm using a simulated annealing approach. The networks are composed of large numbers of low fidelity binary and bearing-only sensors, and small numbers of high fidelity position sensors over a large region. The primitive sensors provide limited information, not sufficient to locate targets; the position sensors can report both range and direction of the targets. Target positions are determined through fusing information from all types of sensors. A score function, which takes into account the fidelity of sensors of different types, is defined and used as the evaluation function for the optimization search. The fusion algorithm is parallelized using spatial decomposition so that the fusion process can finish before the arrival of the next set of sensor data. A series of target tracking simulations are performed on a Linux cluster with communication between nodes facilitated by the Message Passing Interface (MPI). The probability of detection (POD), false alarm rate (FAR), and average deviation (AVD) are used to evaluate the network performance. The input target information used for all the simulations is a set of target track data created from a theater level air combat simulation.
Abstract-this paper describes a phase-locked loop (PLL) designed for clock multiplication in a LVDS transmitter. The PLL consists of a novel low-jitter charge-pump, a fully differential ring-oscillator based VCO, a dynamic-logic PFD, a 2 nd order passive loop filter and a digital frequency divider. The PLL exhibits simultaneously low jitter and low power consumption. It has been integrated into a 0.35 µm CMOS process, occupying 0.09 mm 2 of silicon area. For a 350 MHz output frequency, the circuit features a cycle-to-cycle jitter of 7.1 ps rms and 65 ps peak-to-peak. At that frequency, the PLL consumes 12 mW from a supply voltage of 3.3 V.
Abstract-In this paper, we present the design, fabrication, and electrical characterization of a low-power microwave source for interrogation of cesium atomic hyperfine transition frequency using the coherent population trapping (CPT) technique. The 4.6-GHz frequency generation and signal buffering is performed by a single-chip frequency synthesizer ASIC with a frequency tuning resolution of 1 × 10 −13 and a programmable RF output power from −10 to 0 dBm. The circuit was used to modulate the current of a vertical-cavity surface-emitting laser through a dedicated impedance matching network and low thermal conductivity transmission line. Strong modulation sidebands with >60% of carrier amplitude were obtained with an ASIC power consumption of 12 mW. The system was used as optical source for atomic interrogation in an experimental cesium CPT clock. The measured clock stability of 5 × 10 −11 at τ = 1 s, going down to 4.5 × 10 −12 at τ = 200 s, is limited by the signal-to-noise ratio of the detected CPT signal.
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