Due to the exponential growth of mobile wireless devices, low-power logic chips continue to drive device scaling. To enable sub-10 nm device scaling at an affordable cost, there is a strong need for single exposure advanced lithography. Extreme ultraviolet lithography (EUVL) is one of the most promising candidates to support the design rules for sub-10 nm. The aggressive mobile device design rules continue to push the critical dimension (CD) and pitch and put very stringent demands on the lithography performance such as pattern placement control, image contrast, critical dimension uniformity (CDU), and line width roughness (LWR).In this paper we report the latest advances in resolution enhancement techniques to address low k1 challenges in EUV lithography, specifically: minimizing the pattern placement error, enhancing the through-focus contrast, and reducing the impact of stochastic effects. We have developed an innovative source-mask optimization (SMO) method to significantly reduce edge placement errors (EPE) [1] [2]. Aggressive design rules using the state-of-the-art NA of 0.33 of the NXE:3300B and its successor tools can have imaging below k1 = 0.4, which can extend the current process capabilities for single exposure high volume manufacturing (HVM). Burkhardt et al. reported in a previous study that inserting a sub-resolution assist feature (SRAF) within semi-isolated features introduces strong Bossung tilts and best focus shifts, and a general solution for random pitches is not apparent [3]. Kang observed the same issues and proposed to introduce spherical aberrations to correct these effects while having a global impact on the full-chip [4]. In this work we introduce a new methodology to apply SRAFs to improve contrast, reduce best focus shift, and improve process window. Finally, the lower number of photons of EUV and the small feature size brings serious issue of the stochastic effect that causes the line-edge-roughness (LER) and local CD uniformity (LCDU). Source power, photoresist, mask bias, and feature size all impact the stochastic effects that can result in large LER for low-k1 patterning. We incorporate an empirical LER model in the SMO NXE frame work to study how the pupil, mask, dose, and target CD can be optimized to reduce stochastic edge placement errors (SEPE). We believe that these advanced EUV RET techniques can support imaging k1 below 0.4 and extend single exposure for an NA of 0.33, as is used in the NXE:3300B and its successor tools.
It is well known from 193nm simulation studies that accounting for the electromagnetic (EM) interaction between the incident light and the mask become more important as the mask geometry shrinks. In particular this transition occurs when the size of the mask pattern becomes comparable to the wavelength of light.Early simulation work in EUV lithography indicated rigorous EM calculations are required to predict the subtle effects associated with the mask absorber shadowing effect. These calculations generally show that non-normal mask incidence creates several problems, including HV-bias, slit position dependent bias, and slit position dependent pattern shift. These results are surprising because the mask sizes studied are much larger than the 13.5nm wavelength. If approximate methods could be used rather than the rigorous EM calculations then EUV simulations would be much faster and more accessible.In this study, rigorous EM simulation results are compared with a Kirchoff approximation. The results show that Kirchoff simulations can mimic the shadowing effect with a simple mask bias. It is also found that the pattern shift effect is an artifact caused by a misinterpretation of the rigorous simulation results. With proper biasing depending on the pattern orientation and field position, simple Kirchoff simulation can be used. Thus Any MBOPC tool currently available can handle EUV proximity correction with minor modifications.
The use of immersion technology will extend the lifetime of 193nm and 157nm lithography by enabling numerical apertures (NA) much greater than 1.0. A definition of effective k 1 is derived to assist in comparison of various technologies with differing optical characteristics. The ultimate limits of NA are explored by analysis of polarization effects at the reticle and imaging effects at the wafer. The effect of Hertzian or micro-polarization due to the size of the reticle structures is examined through rigorous simulation. For the regime of interest, 20nm to 50nm imaging, it is found that dense features on the reticle will polarize the light into the TE component upwards of 15%. Below this regime, the light becomes polarized in the TM direction. Additionally, oblique incidence on the reticle, resulting from large system NAs and 4x reduction, will cause PSM phase errors. The use of polarization in the illuminator for imaging will result in substantial gains in exposure latitude and MEF when the NA∼1.3 with 45nm lines at 193nm. The end-of-line pullback for 2-dimensional patterns is reduced by the use of TE polarization in the illuminator. The overall polarization effects increase with decreasing k 1 . The lower limit of optical lithography can be extended by using source-mask optimization and double exposure to go below the classical resolution limit, i.e., k 1 <0.25.
The introduction of polarized light in high NA lithography requires additional characterization metrics for illumination systems. It has been shown that the percentage of the total light intensity that is polarized in the desired direction is a metric that can be closely related to wafer CD. On ASML systems, this quantity is called IPS (Intensity in Preferred State). Illuminators are characterized in terms of the minimum IPS found somewhere across the illuminated area and the IPS Range.In case the mask has a finite birefringence, there is an additional impact on the effective IPS. After passing through the mask blank, the IPS of the light will have changed and hence, there will be a response for wafer CD. Mask birefringence in conjunction with IPS introduces an additional contribution for the CD budget. This work will focus on the impact of mask birefringence on wafer CD for different scenarios of polarized illumination. We will show that the angle of the fast axis of birefringence can have a much greater impact on CD than the maximum birefringence magnitude itself. Based on these results we will derive a requirement for mask birefringence which has it's foundation on CD. We will present measurements of the birefringence distributions of mask blanks, patterned masks, and masks with pellicles to investigate the contribution of the mask process flow starting from substrate, material deposition, processing, and final pellicle application. In addition to the material properties of the pellicle, the mounting of the pellicle to the substrate may induce additional stress birefringence.
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