Today's business environment, survival and making profit in market are the prime requirement for any enterprise due to competitive environment. Innovation and staying updated are commonly identified two key parameters for achieving success and profit in business. Considerably supply chain management is also accountable for profit. As a measure to maximize the profit, supply chain process is to be streamlined and optimized. Appropriate grouping of various suppliers for the benefit of shipment cost reduction is proposed. Data relating to appropriate attributes of supplier logistics are collected. A methodology is proposed to optimize the supplier logistics using clustering algorithm. In the proposed methodology data preprocessing, clustering and validation process have been carried out. The Z-score normalization is used to normalize the data, which converts the data to uniform scales for improving the clustering performance. By employing Hierarchical and K-means clustering algorithms the supplier logistics are grouped and performance of each method is evaluated and presented. The supplier logistics data from different country is experimented. Outcome of this work can help the buyers to select the cost effective supplier for their business requirements.
This paper proposes an approach for optimization of on-chip memory size in data dominated embedded systems. Large amount of array processing is being involved in this category. In order to produce a cost effective system, efficient designing of memory module is quite critical. The memory module configuration being selected by the designer should be well suitable for the application. In this regard, this paper presents a methodology for effective optimization of on-chip memory. For sensitive applications involving large array processing, the entire processing has to be done using embedded modules. While using such module s, care should be taken to meet optimized profile for the design metrics. With help of loop transformation technique, relatively a good amount of memory size requirement is reduced for the arrays. This approach results in a very close memory estimate and an effective optimization. This methodology can be further extended to meet the high level memory optimization applications based on cache characteristics. Speech processing front end mechanism is implemented and shows that this approach gives up to an achievement 61.3% reduction of overall system memory requirement over the estimation approach. Results are provided in terms of comparison of the two approaches of memory estimation and optimization with respect to both of the program and data segments.
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