This paper demonstrates the impact of temperature variation on vertically stacked junctionless nanosheet field effect transistor (JL-NSFET) concerning analog/RF performances using different gate lengths (Lg) along with high-k gate dielectrics. A comprehensive analysis of analog/RF performances like transconductance (gm), gate capacitance (Cgg), gate to drain capacitance (Cgd), output conductance (gds), intrinsic gain (Av), maximum oscillation frequency (fMAX), gain frequency product (GFP), and cutoff frequency (fT) is carried out for the temperature range 77-400 K. Note that with the decrease in temperature from 400 to 77 K, there is an improvement in AV, GFP, fT, and fMAX by ~7.43%, ~78.4%, ~78.38%, ~50.9%, respectively. It is also found AV gets degraded with the downscaling of Lg from 16 to 8 nm. However, the same resulted in the improvement of RF performance. From detailed analysis, it is further observed that the usage of high-k gate dielectrics (k=22) in JL-NSFET devices is not suitable due to the depreciation of analog/RF FOMs. Moreover, it is also noted that the improvement in analog/RF performance (ΔFoM = FoM(T=400) – FoM(T=100)) resulted from lowering the temperature can further be improved by downscaling of Lg and by using low-k gate dielectric.
This article for the first time reports the design and performance optimization of Junctionless (JL) Bottom spacer (BSP) FinFET. Initially to get the desired value of workfunction (∅_m) and fin thickness (Tfin) for analog/RF analysis, the optimization of these parameters has been done by considering several values. It has been noticed that the increase in ∅_m and reduction in Tfin can lead to better electrical performance with suppressed short channel effects (SCE). Further, it is also observed that reduction in bottom spacer height (HBSP) can fetch enhanced analog/RF performance considering the improvement noticed in transconductance (gm), intrinsic gain (AV), transconductance generation factor (TGF), cutoff frequency (fT), and Gain frequency product (GFP). Moreover, when the bottom spacer dielectric permittivity (KBSP) is increased from 3.9 to 22, it has been found that the analog/RF performance degrades significantly.
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