Quantum-dot cellular automata (QCA) has come out as one of the potential computational structures for the emerging nanocomputing systems. It has a large capacity in the development of circuits with high space density and dissipation of low heat and allows faster computers to develop with lower power consumption. The QCA is a new appliance to realize nanolevel digital devices and study and analyze their various parameters. It is also a potential technology for low force and high-density memory plans. Large memory designs in QCA show unique features because of their architectural structure. In QCA-based architectures, memory must be maintained in motion, i.e., the memory state has to be continuously moved through a set of QCA cells. These architectures have different features, such as the number of bits stored in a loop, access type (serial or parallel) and cell arrangement for the memory bank. However, the decisive features of the QCA memory cell design are the number of cells, to put off the use of energy. Although the review and study of the QCA-based memories are very important, there is no complete and systematic literature review about the systematical analyses of the state of the mechanisms in this field. Therefore, there are five main types to provide systematic reviews about the QCA-based memories; including read only memory (ROM), register, flip-flop, content addressable memory (CAM) and random access memory (RAM). Also, it has provided the advantages and disadvantages of the reviewed mechanisms and their important challenges so that some interesting lines for any coming research are provided.
Quantum‐dot cellular automata (QCA) are prospective nanotechnology with striking performance to tackle the shortcomings of complementary metal‐oxide‐semiconductor (CMOS) transistor‐based technology such as fabrication dimensions and switching speed. The demultiplexer, as a crucial component for the design of many logic circuits, comprises a circuit for separating the multiplex data into the component data. The demultiplexer is highly utilised in the communication system for building serial data lines to parallel ones. So, its efficient schematisation has turned to an issue that has captured the concentration of the investigation group. Therefore, a novel structure of QCA‐based one to two demultiplexers is proposed, and it is employed to design one to four demultiplexers. QCAdesigner software, as a powerful layout and tool for simulation, is utilised for evaluating the validity and practicality of the proposed structures. The detailed evaluation of proposed layouts shows excellent performance than prior operations, and notable developments regarding the occupied area, cell count, and latency.
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