The issue of frequency offset in low data rate, narrowband and low power communication nodes is considered in this paper. To avoid power hungry precise frequency generation, offset tolerant demodulation and detection schemes are investigated. A Short-Time DFT (ST-DFT) based detection for BFSK is introduced which improves the BER performance of an existing design by almost 1dB. Its BER performance and complexity are also compared to frequency offset tolerant DDBPSK demodulation. Additionally, the effect of wider filter required to capture signal in presence of frequency offset is considered. The trade-off between performance and complexity for different offset values and filter bandwidths is discussed. Both methods work independent of frequency offset; however, it is shown that wider filters do not affect ST-DFT BER performance in contrast with DDBPSK. This robustness is obtained at the expense of increased computational load.

A DFT-based demodulator for BFSK is used for applications where the received signal experiences a carrier frequency offset (CFO) much larger than the data rate. It is particularly interesting for emerging ultra-narrowband communications for wireless sensor networks and IoT. The drawback is that the synchronization algorithm proposed for such a demodulator involves calculating the DFT for a window sliding over the whole preamble. This imposes a large computational load which is not desired in low power applications. To overcome CFO the sampling frequency should be larger than the signal bandwidth. Thus, the spectral range of the DFT is larger than the signal bandwidth. This means that only a subset of DFT bins have information about the signal; however, due to unknown CFO, the conventional synchronization algorithm needs all bins of the DFT. In this work, a novel synchronization algorithm is proposed which only needs a subset of DFT bins. Such algorithm can simplify implementation because efficient Single Bin Sliding DFT (SB-SDFT) algorithms can be used. Moreover, to be able to use the SB-SDFT algorithm, it is modified to incorporate zero-padding. The proposed algorithm and its implementation using the modified SB-SDFT reduce the number of complex multiplications, complex additions and memory usage by 28%, 64% and 81%, respectively, while achieving the same BER performance for the demodulator.

The autocorrelation demodulator (ACD) for DDPSK is an offset tolerant demodulator which has been introduced for applications where the signal experiences large Doppler shift. Moreover, emerging ultra-narrowband solutions for Internet of Things and Wireless Sensor Networks can exploit DDPSK to avoid the use of costly crystal or power hungry thermal compensators. However, to tolerate frequency offset the bandwidth of the lowpass or bandpass filter before the demodulator must increase which leads to a larger noise bandwidth and degrades BER performance. This work proposes a new method to overcome this problem. Instead of one path of ACD, samples at the output of the filter go through multiple paths with adjusted delay and interval for correlation in the ACD. The sum of the outputs of these paths provide the input to the detector with an increased SNR compared to conventional structure. Using the proposed method, the SNR per bit required for a certain BER remains independent of filter bandwidth if the target BER is less than 0.01.

Interconnected temperature sensors in a wine cellar, smart meters in houses and wearable sensors monitoring health status are all examples of Wireless Sensor Networks (WSN). Thanks to the progress in wireless communications and networking technologies as well as developments in electronic design, it is possible to deploy numerous low power wirelessly connected devices and sensors for a variety of applications. Nevertheless, improving energy efficiency for power constrained wireless nodes is a never-ending quest. Providing wireless communication for diverse applications with different requirements has led to the emergence of different types of wireless networks. A recently emerged type of wireless networks is Low Power Wide Area Network (LPWAN) which provides a wide coverage (10-50km in rural areas and 1-5 km in Urban areas) and low power communication for low data rate applications. xvi for all the tips and talks. Moreover, I wish to thank Ghayoor Gillani for his help, particularly, during the final preparation of this thesis as well as Guus Kuipers for making this template available. Spending eight hours a day in office becomes pleasant with cool office-mates and for that I would like to thank Oguz Meteer and Anuradha Chathuranga Ranasinghe. My first culture shock (!) was the concept of lunch walk, which practically did not include much lunch! It was an example of amazing activities in the CAES group with lots of fun moments and enlightening discussions; I would

The DFT-based demodulator for BFSK has been introduced for applications where the received signal experiences a carrier frequency offset (CFO) much larger than the symbol rate. The Ultra-Narrowband (UNB) communication techniques have been introduced for implementing the emerging Low Power Wide Area Networks (LPWAN). Since UNB communication is prone to CFO, a DFT-based BFSK demodulator is an interesting option for this type of communication. However, for proper operation in a large frequency offset, the DFT-based demodulator requires a complex window synchronization which is not desirable for low power nodes. The main source of complexity, is calculating the DFT of a window which slides over the preamble. In this work, the complexity is alleviated by considering the window synchronization algorithm and its implementation together. First, a new window synchronization algorithm is proposed which is designed such that an efficient class of implementations of the sliding DFT (SDFT), called Single Bin SDFT (SB-SDFT) in this work, can be used. Moreover, a new stable implementation of SB-SDFT is designed to enable zero-padding which is required by the demodulator. The complexity of the proposed algorithm implemented using the SB-SDFT, scales more efficiently compared to the conventional algorithm when the range of tolerable CFO increases. Using the proposed method, for a CFO tolerance in the order of 14.5 times the symbol rate (±14.5 kHz for a symbol rate equal to 100 Hz), the number of complex operations is reduced by more than 85% (and memory by 90%) compared to the conventional method.