An overlayer system composed of a thin film on the top of a semi-infinite substrate was studied in this work for electron inelastic interactions. Analytical expressions for the depth-dependent inelastic differential and integral inverse mean free paths were derived for both incident and escaping electrons. The interface ͑film-substrate͒ effect and the surface ͑vacuum-film͒ effect were analyzed by comparing the results of an overlayer system and a semi-infinite system. It was found that the interface effect extended to several angstroms on both sides of the interface for a 500 eV electron incident into or escaping from the vacuum-SiO 2 -Si and the vacuum-Au-Ni systems. An application of the spatial-varying inelastic differential inverse mean free paths was made by Monte Carlo simulations of the electron elastic backscattering from an overlayer system. Good agreement was found between results calculated presently and data measured experimentally on the elastic reflection coefficient.for zϽϪD/2, B͑,Q,,z ͒ϭ 21ͭ 2 cos ͫ ͑zϩD/2͒ z ͬ Ϫexp͓ϪQ͑zϩD/2͔͒ ͮ Ϫ 21 23 exp͑ϪQD͒exp͓Q͑zϪD/2͔͒ ⑀ 2 ͑ Q,,zϩD/2͓͒1Ϫ 21 23 exp͑Ϫ2QD͔͒ ϩ 23 exp͓Q͑zϪD/2͔͒Ϫ 23 21 exp͑ϪQD͒ ͭ 2 cos ͫ ͑zϩD/2͒ z ͬ Ϫexp͓ϪQ͑zϩD/2͔͒ ͮ ⑀ 2 ͑ Q,,zϪD/2͓͒1Ϫ 21 23 exp͑Ϫ2QD͔͒ ϩ ͫ 1 ⑀ 2 ͑q ,͒ ͬ , ͑10͒ for ϪD/2ϽzϽD/2 and 8249 21ͭ 2 cos ͫ ͑zϩD/2͒ z ͬ Ϫexp͓ϪQ͑zϩD/2͔͒ ͮ exp͓ϪQ͑zϩD/2͔͒Ϫ 21 23 exp͑Ϫ2QD͒ ⑀ 2 ͑Q,͕͒1Ϫ 21 23 exp͑Ϫ2QD͖͒ ϩ 23 exp͓Q͑2zϪD ͔͒Ϫ 23 21 exp͑ϪQD͒ ͭ 2 cos ͫ ͑zϩD/2͒ z ͬ Ϫexp͓ϪQ͑zϩD/2͔͒ ͮ exp͓Q͑zϪD/2͔͒ ⑀ 2 ͑ Q, ͓͒1Ϫ 21 23 exp͑Ϫ2QD͔͒ ϩ ͫ 1 ⑀ 2 ͑Q,͒ ͬ , ͑16͒ for ϪD/2ϽzϽD/2 and B͑,Q,,z ͒ϭ 23 ͓1ϩ 21 exp͑Ϫ2QD͔͒ ͭ 2 cos ͫ ͑zϪD/2͒ z ͬ Ϫexp͓ϪQ͑zϪD/2͔͒ ͮ exp͓ϪQ͑zϪD/2͔͒ ⑀ 3 ͑ Q, ͕͒1Ϫ 21 23 exp͑Ϫ2QD͖͒ Ϫ 21 ͓1ϩ 23 ͔ ͭ 2 cos ͫ ͑zϩD/2͒ z ͬ Ϫexp͓ϪQ͑zϩD/2͔͒ ͮ exp͓ϪQ͑zϩD/2͔͒ ⑀ 3 ͑ Q, ͓͒1Ϫ 21 23 exp͑Ϫ2QD͔͒ ϩ ͫ 1 ⑀ 3 ͑Q,͒ ͬ , ͑17͒ for zϾD/2.8250

A novel coaxial-structured amorphous-silicon (a-Si) p-i-n solar cell with 1-mu m-long low-temperature hydrothermally synthesized Al-doped-ZnO (AZO) nanowires was demonstrated for the first time. The conversion efficiency. increased from 3.92% to 4.27% when the intrinsic a-Si thickness was increased from 25 to 150 nm and then decreased to 3.66% when the intrinsic layer thickness was further increased to 250 nm. It was attributed to an excessively thick intrinsic a-Si layer that would decrease the internal electrical field and interfere with charge separation. With the optimum intrinsic a-Si thickness of 150 nm, the conversion efficiency increased from 4.27% to 4.73% when the AZO wire length was increased from 1 to 2 mu m. Moreover, the proposed coaxial-structured solar cell exhibited a nearly 46% efficiency enhancement over a conventional a-Si thin-film solar cell

In 0.5 Ga 0.5 As ∕ In 0.5 Al 0.5 As metamorphic high electron mobility transistos were fabricated with different gate-metal formations: mesa type or air type and without or with a buried gate. Only air-type devices with a buried gate show no kink effect. Experimental results indicate that gate-feeder metal and annealing process give effects on gate current and noise figure. The peak gate current of 12 (120)μA∕mm for air-type (mesa-type) devices before annealing is improved to 8 (55)μA∕mm after annealing. At 1.8GHz, associated gain of 25dB is obtained at Fmin=1.24dB for air-type devices after annealing, while 23dB is obtained at Fmin=1.25dB before annealing.

The electrical characteristics and reliability of n-type gate-allaround (GAA) polycrystalline silicon (poly-Si) thin-film transistors (TFTs) with multi-nanowire channels are investigated. The multinanowire channels are fabricated by the spacer formation technique without any advanced lithography technology. And the GAA structure is constructed after the suspended nanowire is conformally deposited by the gate insulator and in-situ doped polySi gate in sequence. Due to the completely surrounding gate, the original electrical characteristics of GAA poly-Si TFTs are superior to that of traditional planar poly-Si TFTs, resulting from the improvement of gate controllability in the short dimensional TFTs. Lower threshold voltage, higher driving current and the suppression of drain-induced barrier lowering (DIBL) and kink effects are exhibited for the GAA poly-Si TFTs with multinanowire channels. However, owing to the enlargement of electric field of a spacer with three sharp corners, the GAA poly-Si TFTs suffer from severer hot carrier effect than planar TFTs. No matter what dc or ac hot carrier stress, the degradation of device's electrical parameters of GAA poly-Si TFTs is larger than that of conventional planar poly-Si TFTs.