Phase Change Random Access Memory (PCRAM) has several characteristics that make it a promising candidate for main memory. In this paper, the challenges involved in incorporating PCRAM into the main memory hierarchy of flash-based systems are explored, and a hybrid memory hierarchy consisting of PCRAM and DRAM for SSD is proposed. To reduce the write traffic of Flash, a buffer management scheme for the hybrid memory is implemented. The proposed scheme above is implemented on basis of Disksim platform. The simulation results indicate that the proposed buffer algorithm can decrease the number of random write and erase operations of the SSD and improve the average system response rate obviously.
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