A high integrated 10.2‐inch WVGA LTPS LCDs with single‐chip ASIC and manufactured by PMOS process was developed. Level shifters, DC‐DC converters for gate driver with 2‐phase shift registers and forward/reverse scanning function and 1:6 demultiplexer for source driver were integrated on the glass. The ASIC includes timing controller and 400‐channel source driver. This architecture dramatically reduces cost with high mechanical robustness. Furthermore, the 6‐Mask PMOS process also improves the throughput and reduces yield loss in manufacturing due to less photo layers than CMOS one, especially for large panel size. Therefore, this 10.2‐inch panel is remarkable for high integration of PMOS LTPS design and the cost reduction
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