An optical interconnect transmitter based on guided-wave silicon optical bench is demonstrated. The guided-wave silicon optical bench (GW-SiOB) is developed on a silicon-on-insulator (SOI) substrate. The three-dimensional guided-wave optical paths on the silicon optical bench are realized using trapezoidal waveguides monolithically integrated with 45° micro-reflectors. Such three-dimensional guided-w ave optical paths of SiOB would simplify and shrink the intra-chip optical interconnects located on a SOI substrate. The clearly open eye patterns operated at a data rate of 5 Gbps verifies the proposed GW-SiOB is suitable for intra-chip optical interconnects.
A chip-level optical interconnect module combined with a vertical-cavity surfaceemitting laser (VCSEL) chip, a photodetector (PD) chip, a driver integrated circuit (IC), and an amplifier IC on a silicon-on-insulator (SOI) substrate with 3-D guided-wave paths is experimentally demonstrated. Such an optical interconnect is developed for the signal connection in multicore processors or memory-to-processor interfaces. The 3-D guided-wave path, consisting of silicon-based 45 microreflectors and trapezoidal waveguides, is used to connect the optical signal between transmitter and receiver. In this paper, the VCSEL and PIN PD chips are flip-chip integrated on a SOI substrate to achieve complete chip-level optical interconnects. Due to the unique 3-D guided-wave path design, a higher laser-to-PD optical coupling efficiency of À2.19 dB and a larger alignment tolerance of AE10 m for the VCSEL/PD assembly are achieved. The measured laser-to-PD optical transmission efficiency can reach À2.19 dB, and the maximum optical power and threshold current of VCSEL is 3.27 mW and 1 mA, respectively. To verify the data transmission, the commercial driver IC and amplifier IC are assembled upon the silicon chip, and the error-free data transmission of 10 Gbps can be achieved when the VCSEL is operated at the driving current of 9 mA.
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