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This paper provides an overview of the Parallel Architecture Core (PAC) project led by SoC Technology Center of Industrial Technology Research Institute (STC/ITRI) in Taiwan. The background of PAC project, a brief introduction to PAC core technologies, PAC SoC development suite, PAC benchmarks, and applications are presented. The main objective of the PAC development plan is to enhance industrial development competitiveness in the core technology related to key components, especially for portable multimedia applications.

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In this paper, we propose a Multimedia Direct Memory Access Controller (M-DMAC) architecture for multimedia application. By observing the characteristics of the reference blocks for inter-prediction operation, several improvements are made in the M-DMAC. To reduce the address calculation time, the M-DMAC provides 2D coordination setting interface and helps transform the X-Y coordination information configured by user into physical data address. Furthermore, single M-DMAC channel configuration could transfer up to four reference blocks at a time. Besides, the M-DMAC allows non-specific address alignment data to be transferred in word size, which highly increases the bus bandwidth utilization. Experimental results show that our proposed M-DMAC performs around 2-4 times faster than traditional DMAC which supports 2D transfer.