The paper proposes an algorithm for image encryption using the random bit sequence generator and based on chaotic maps. Chaotic Logistic and Tent maps are used to generate required random bit sequences. Pixels of the plain image are permuted using these chaotic functions, and then the image is partitioned into eight bit map planes. In each plane, bits are permuted and substituted according to random bit and random number matrices; these matrices are the products of those functions. The pixels and bit maps permutation stage are based on a chaotic random Ergodic matrix. This chaotic encryption method produces encrypted image whose performance is evaluated using chi-square test, correlation coefficient, number of pixel of change rate (NPCR), unified average changing intensity (UACI), and key space. The histogram of encrypted image is approximated by a uniform distribution with low chi-square factor. Horizontal, vertical, and diagonal correlation coefficients of two adjacent pixels of encrypted image are calculated. These factors are improved compared to other proposed methods. The NPCR and UACI values of encrypted image are also calculated. The result shows that a swift change in the original image will cause a significant change in the ciphered image. Total key space for the proposed method is (2 ∧ 2,160), which is large enough to protect the proposed encryption image against any bruteforce attack.
This report deals with describing permutation of FFT (Fast Fourier Transform) coefficients in speech encryption system. The scrambling algorithm is based on the permutation of the FFT coefficients and provides highly secured scrambled signal by permuting a large number of those coefficients.The algorithm for generation the permutation matrices is explained.This system is useful for a band limited telephone channel and mobile communication. Choice and construction of permutation matrices in scrambling system are considered. Simulation have been done by using C programming language. The results of simulation and tests shows that proposed scrambling achieves extremely high-level security as well as high speech quality.
In this paper, we have presented a new permutation-substitution image encryption architecture using chaotic maps and Tompkins-Paige algorithm. The proposed encryption system includes two major parts, chaotic pixels permutation and chaotic pixels substitution. A logistic map is used to generate a bit sequence, which is used to generate pseudorandom numbers in Tompkins-Paige algorithm, in 2D permutation phase. Pixel substitution phase includes two process, the tent pseudorandom image (TPRI) generator and modulo addition operation. All parts of the proposed chaotic encryption system are simulated. Uniformity of the histogram of the proposed encrypted image is justified using the chi-square test, which is less than (255, 0.05). The vertical, horizontal, and diagonal correlation coefficients, as well as their average and RMS values for the proposed encrypted image are calculated that is about 13% less than previous researches. To quantify the difference between the encrypted image and the corresponding plain-image, three measures are used. These are MAE, NPCR, and UACI, which are improved in our proposed system considerably. NPCR of our proposed system is exactly the ideal value of this criterion. The key space of our proposed method is large enough to protect the system against any Brute-force and statistical attacks.
Hardware Trojan Horses (HTHs) are malicious modifications inserted in Integrated Circuit during fabrication steps. The HTHs are very small and can cause damages in circuit function. They cannot be detected by conventional testing methods. Due to dangerous effects of them, Hardware Trojan Detection has become a major concern in hardware security. In this paper, a new HTH detection method is presented based on side-channel analysis that uses path delay measurement. In this method, we find and observe the paths that Trojans have most effect on them. Most of the previous works add some structures to the circuit and need a large overhead cost. But, in our method, there is no modification in the circuit and we can use it for testing the circuits received after fabrication. The proposed method is evaluated with Xilinx FPGA over a number of test circuits. The results show that measuring the delays on 20 paths with an accuracy of 0.01[Formula: see text]ns can detect more than 80% of Trojans.
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