Although scaled down technologies may suffer from statistical parameter fluctuations caused by process variability, they are potentially radiation hard from a total-dose perspective. Therefore, the proton radiation hardness of a high-κ/metal gate 45 nm CMOS technology is studied using wafer level testing on 300 mm wafers. Attention is given to the correlation between pre- and post-radiation parameter variations. It is demonstrated that both the pre-irradiation process variability and the radiation-induced variability of the parameters have to be taken into account. For devices with a capping layer, the type of dielectric layer has an impact on the radiation-induced trapping mechanisms.
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