Investigation of stochastic resonance in GaAs-based nanowire field-effect transistors (FETs) controlled by Schottky wrap gate and their networks is described. When a weak pulse train is given to the gate of the FET operating in a subthreshold region, the correlation between the input-pulse and source-drain current increases by adding input noise. Enhancement of the correlation is observed in a summing network of the FETs. Measured correlation coefficient of the present system can be larger than that in a linear system in the wide range of noise. An analytical model based on the electron motion over a gate-induced potential barrier quantitatively explains the experimental behaviors.
Abstract-A novel hexagonal binary-decision-diagram (BDD) quantum logic circuit approach for III-V quantum large scale integrated circuits is proposed and its basic feasibility is demonstrated. In this approach, a III-V hexagonal nanowire network is controlled by Schottky wrap gates (WPGs) to implement BDD logic architecture by path switching. A novel single electron BDD OR logic circuit is successfully fabricated on a GaAs nanowire hexagon and correct circuit operation has been confirmed from 1.5 K to 120 K, showing that the WPG BDD circuit can operate over a wide temperature range by trading off between the power-delay product and the operation temperature.Index Terms-Binary decision diagram (BDD), GaAs, logic circuit, Schottky wrap gate (WPG), single electron.
Lateral surface leakage current ͑I s ͒ on an AlGaN / GaN heterostructure was systematically investigated by using a two-parallel gate structure with a gap distance ͑L GG ͒ of 200 nm-5 m. The surface current I s systematically increased as L GG decreased. A simple resistive layer conduction that should show 1 / L GG dependence failed to account for the drastic increase in I s when L GG was reduced to less than 1 m. However, no dependence on L GG was seen in vertical current that flows in the Schottky interface. The I s showed a clear temperature dependence proportional to exp͑−T −1/3 ͒, indicating two-dimensional variable-range hopping through high-density surface electronic states in AlGaN. A pronounced reduction in surface current of almost four orders of magnitude was observed in a sample with SiN x passivation.
In this paper, a vertical-aligned silicon nanowires (Si NWs) array has been synthesized and implemented to the Si NW-array-textured solar cells for photovoltaic application. The optical properties of a Si NWs array on both the plane and pyramid-array-textured substrates were examined in terms of optical reflection property. Less than 2% reflection ratio at 800 nm wavelength was achieved. Using leftover monocrystalline Si (c-Si) wafer (125×125 mm2), a 16.5% energy conversion efficiency, with 35.4% enhancement compared to the pyramid-array-textured c-Si solar cells, was made by the Si NW-array-textured solar cells due to their enhanced optical absorption characteristics. However, without SiNx passivation, the short circuit current reduced due to the increased surface recombination when using Si NWs array as surface texturing, indicating that an optimum surface passivation was prerequisite in high-efficiency Si NW-array-textured solar cells.
Previous quantum device research has been done on discrete device levels and lacks a clear vision for high density integration. This paper proposes a new, simple and realistic approach for quantum large scale integrated circuits (QLSIs) where a binary-decision diagram (BDD) logic architecture is implemented by BDD node devices based on quantum wire transistors (QWTrs) and single electron transistors (SETs) realized by the Schottky in-plane gate (IPG) and wrap-gate (WPG) control of III-V hexagonal nanowire networks. To investigate the feasibility of the proposed approach, BDD devices having QWTrs were formed on GaAs/AlGaAs etched nanowire patterns. They showed expected complimentary quantized conductance switching as required to achieve operation at delay-power products near the quantum limit. Use of embedded InGaAs honeycomb wire networks grown by selective MBE on InP substrates is proposed for constructing circuits operating in quantum regime at room temperature. PACS: 85.30VwKeywords: binary decision diagram (BDD), quantum wire transistor, III-V semiconductor, Schottky in-plane gate, Schottky wrap gate 1
A simple method for fabricating single-layer graphene nanoribbons (sGNRs) from double-walled carbon nanotubes (DWNTs) was developed. A sonication treatment was employed to unzip the DWNTs by inducing defects in them through annealing at 500 °C. The unzipped DWNTs yielded double-layered GNRs (dGNRs). Further sonication allowed each dGNR to be unpeeled into two sGNRs. Purification performed using a high-speed centrifuge ensured that more than 99% of the formed GNRs were sGNRs. The changes induced in the electrical properties of the obtained sGNR by the absorption of nanoparticles of planar molecule, naphthalenediimide (NDI), were investigated. The shape of the I-V curve of the sGNRs varied with the number of NDI nanoparticles adsorbed. This was suggestive of the existence of a band gap at the narrow-necked part near the NDI-adsorbing area of the sGNRs.
In this study, we extracted the essential spatiotemporal dynamics that allow an amoeboid organism to solve a computationally demanding problem and adapt to its environment, thereby proposing a nature-inspired nanoarchitectonic computing system, which we implemented using a network of nanowire devices called 'electrical Brownian ratchets (EBRs)'. By utilizing the fluctuations generated from thermal energy in nanowire devices, we used our system to solve the satisfiability problem, which is a highly complex combinatorial problem related to a wide variety of practical applications. We evaluated the dependency of the solution search speed on its exploration parameter, which characterizes the fluctuation intensity of EBRs, using a simulation model of our system called 'AmoebaSAT-Brownian'. We found that AmoebaSAT-Brownian enhanced the solution searching speed dramatically when we imposed some constraints on the fluctuations in its time series and it outperformed a well-known stochastic local search method. These results suggest a new computing paradigm, which may allow high-speed problem solving to be implemented by interacting nanoscale devices with low power consumption.
Stochastic resonance in a summing network with varied thresholds was investigated using GaAs-based etched nanowire field-effect transistors having different threshold voltages. The network's response adapted to input offset fluctuations in the range of the threshold voltage variation and the network could detect a weak signal without any adjustment of the input offset or the addition of high noise. The observed adaptability resulted from a widened dynamic range of the system due to signal decomposition and reconstruction by multiple thresholds together with the output summation process. © 2010 American Institute of Physics. ͓doi:10.1063/1.3428784͔The coexistence of noise and fluctuations created by utilizing stochastic resonance ͑SR͒ has recently been an interesting issue in electronics. 1-4 SR is a phenomenon in which the response of a system is enhanced by adding noise. 5,6 It is known to be a key mechanism for precise detection and transmission of weak signals comparable to the thermal energy in biological systems. 7 To date, many electronic systems that artificially cause SR have been investigated 8-12 but they have never been turned into practical applications excepting dithering. A major reason is that the SR at an optimal noise never improves the information content of the signal as that before adding noise. However it can improve the information transfer and the signal-to-noise ratio with noise, 13,14 and this feature is still useful for electronics. We have succeeded in causing SR in a semiconductor nanowire field-effect transistor ͑FET͒ and have demonstrated an enhancement of the response of an FET parallel summing network. 15 At this stage, the positive contribution of noise has been confirmed, but the influence of the physical fluctuation of network units on SR has not been clarified, although Collins et al. 16 suggested that the noise compensates for the variation in units leading to an optimally enhanced system response. In this Letter, we report on our investigation of the signal response of a summing network of GaAs-based nanowire FETs with threshold voltage variation. The threshold voltages of seven FETs were artificially modified by making devices of different sizes. A parallel summing network was formed using the different FETs and the system's SR response was characterized experimentally.An FET summing network with varied threshold voltages is schematically shown in Fig. 1͑a͒. The basic mechanism of SR is a noise-assisted state transition in a threshold system. 6,13 To cause SR, we utilized the nonlinearity of the FET gate threshold characteristic. 15 The input and output of this system were gate voltage V G and the sum of the sourcedrain current from each FET ͚I DS ͑=I out ͒, respectively. The FET was operated in the subthreshold region. The FETs were fabricated on nanowires formed by electron beam lithography and wet chemical etching of a conventional AlGaAs/ GaAs modulation-doped structure with a two-dimensional electron gas. A Schottky wrap gate ͑WPG͒ was formed on each nanowire. An exam...
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