Smart or intelligent sensors are integrated physical units embedded with sensors, processors, and communication devices. The sensors also known as edge nodes form the lower-most tier in the internet of things architecture. These devices rely on cryptographic technique to ensure 'root of trust' for the users. The implementation attacks namely side-channel attacks (SCAs) pose a dangerous threat for the cryptographic implementation in the edge nodes since the attacks are undetectable by nature. Among the different categories of SCAs proposed in the literature, power analysis attacks (PAAs) are vastly studied and widely employed because it can be mounted with relatively inexpensive equipment. In this study, the different categories of PAAs along with the countermeasures are reviewed in detail. The impact of the SCA on the edge nodes is examined along with a case study on medical sensor nodes.

Side‐channel attacks pose an inevitable challenge to the implementation of cryptographic algorithms, and it is important to mitigate them. This work identifies a novel data encoding technique based on 1‐of‐4 codes to resist differential power analysis attacks, which is the most investigated category of side‐channel attacks. The four code words of the 1‐of‐4 codes, namely (0001, 0010, 1000, and 0100), are split into two sets: set‐0 and set‐1. Using a select signal, the data processed in hardware is switched between the two encoding sets alternately such that the Hamming weight and Hamming distance are equalized. As a case study, the proposed technique is validated for the NIST standard AES‐128 cipher. The proposed technique resists differential power analysis performed using statistical methods, namely correlation, mutual information, difference of means, and Welch's t‐test based on the Hamming weight and distance models. The experimental results show that the proposed countermeasure has an area overhead of 2.3× with no performance degradation comparatively.

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Random delay countermeasures introduce random delays into the execution flow to break the synchronization and increase the complexity of the side channel attack. A novel method for attacking devices with random delay countermeasures has been proposed by using a maximal overlap discrete wavelet transform (MODWT)-based power trace alignment algorithm. Firstly, the random delay in the power traces is sensitized using MODWT to the captured power traces. Secondly, it is detected using the proposed random delay detection algorithm. Thirdly, random delays are removed by circular shifting in the wavelet domain, and finally, the power analysis attack is successfully mounted in the wavelet domain. Experimental validation of the proposed method with the National Institute of Standards and Technology certified Advanced Encryption Standard-128 cryptographic algorithm and the SAKURA-G platform showed a 7.5Â reduction in measurements to disclosure and a 3.14Â improvement in maximum correlation value when compared with similar works in the literature.

Artificial Neural Networks (ANNs) are becoming increasingly important in the present technological era due to their ability to solve complex problems, adapt to new inputs, and improve decision-skills for different domains. The human brain serves as a model for Artificial Neural Networks (ANNs), a type of machine learning, as a reference for both structure and function. The existing work on ANNs supports tasks, such as regression, classification and pattern recognition separately. The discussion aims at resolving the above highlighted issues related to various ANN architectural implementations, considering the dynamic function exchange feature of FPGAs. With the aid of Zynq SOC, CNN and DNN architectures are designed in its Processing System, and the structure is accelerated using Programmable Logic. It also solves the issues due to trojans on design files, by introducing cryptography within the accelerator.