Multilevel inverters provide an output signal with low harmonic distortion and superior output voltages. This work proposes a new four-level T-type neutral point piloted (T-NPP) topology with higher efficiency and low total harmonic distortion (THD) and with the ability to withstand high voltage stresses, especially for high-power applications. The proposed topology is designed in such manner that the direct current (DC)-voltage stresses split over the components with strong possibilities to increase the load current and switching frequency. However, the operation of the proposed topology is based on two essential principles. The first principle is that each upper and lower switch of each leg consists of two insulated gate bipolar transistors (IGBTs) connected in series in order to withstand high voltage stresses and make it split over the two IGBTs in each switch. The second principle is using the DC-link circuit (T1 & T2) to generate 2Vdc and 1Vdc by connecting the bidirectional switches of each leg to the DC-link's mid-point. Furthermore, the proposed four-level T-NPP inverter outperforms other converters by the high number of output voltage level, low number of components, simple structure and higher efficiency. Finally, the proposed T-NPP topology concept was validated via simulation, experiments and theoretical analysis.
This paper proposes a new N-multilevel topologies for T-type inverter. The proposed topologies constitute the single bridge legs with the shape of the rotated character "T" and a variable direct current-link circuit. The proposed topologies present higher efficiency and lower number of components compared with NPC topologies and nested multilevel topologies. Also, other topologies have been compared in terms of reduced number of diodes, switches, flying capacitors, and DC supplies. The optimized staircase modulation technique is used to obtain voltage waveforms with high quality and superior output voltages. Furthermore, the principles of the proposed topologies were validated via simulations and experiments.
This research proposes a four-level T-type inverter that is suitable for low-power applications. The presented topology outranks other types of inverters in terms of a smaller number of semiconductor devices, absence of passive components such as clamping diodes and flying capacitors, low switching and conduction losses, and high efficiency. The proposed topology is free from voltage deviation and unbalanced voltage occurrences that are present in other multilevel converters having clamping diodes or flying capacitors. The proposed inverter can extend to N levels using unequal dc-link voltage sources for medium-voltage application. The inverter employs the simple fundamental frequency staircase modulation technique. Moreover, this paper presents a current commutation strategy to prevent the occurrences of short circuit and minimizing the number of required switching devices and switching transitions, resulting in improving the efficiency of the inverter. This paper also analyses the theoretical converter losses showing lower switching and conduction losses when compared to existing four-level inverters. The experimental validation of the proposed inverter shows its operating feasibility and a low output voltage THD.
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