Cascaded integrator comb (CIC) filters are one of the most economical multirate filters widely used as decimators in digital receivers. Several CIC decimators using different means of arithmetic are evaluated and the designs are synthesised for Altera field programmable gate arrays and cell-based integrated circuits using Synopsys tools. The proposed designs show 53-164% speed improvement and require lower costs (A * T) in most study cases. Design Optimisation Data without pruning Data with pruning clk= ns Total gates clk* Kgates clk= ns Total gates clk*
In the last two decades, it has been observed that there have been remarkable advancements in digital media communication. It has lots of advantages and business potential as it needs no physical media or transport. However, digital media can also create several big problems for media owners due to unauthorized use, ease of replication, plasticity, and equivalence of works in digital form. The possible solution is to secure digital media by cover writing which can also referred as steganography. Therefore, this article focusing on development of hybrid speech steganography system using spread spectrum-based redundant discrete wavelet transform (SS-RDWT). In general, speech steganography utilizes cover speech to embed the secrete message, however, the cover speech might be larger in size and contains many pauses, which requires more storage capacity, higher computational time, and even higher power usage results in system performance degradation. Hence, in addition to the proposed SS-RDWT approach, an intelligent pause detection protocol (IPDP) with maximum likelihood estimation (MLE) technique is employed for removing pause from cover speech signal, which reduces the transmission bandwidth, storage capacity and power consumption as well. Simulation results demonstrate that proposed hybrid steganography using integrated SS-RDWT with IPDP-MLE approach obtained superior performance as compared to state-of-art approaches.
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