Interferometric lithography (IL) is a powerful technique for the definition of large-area, nanometer-scale, periodically patterned structures. Patterns are recorded in a light-sensitive medium, such as a photoresist, that responds nonlinearly to the intensity distribution associated with the interference of two or more coherent beams of light. The photoresist patterns produced with IL are a platform for further fabrication of nanostructures and growth of functional materials and are building blocks for devices. This article provides a brief review of IL technologies and focuses on various applications for nanostructures and functional materials based on IL including directed self-assembly of colloidal nanoparticles, nanophotonics, semiconductor materials growth, and nanofluidic devices. Perspectives on future directions for IL and emerging applications in other fields are presented.

Anisotropic selective epitaxy in nanoscale-patterned growth (NPG) by molecular-beam epitaxy is investigated on a 355nm period two-dimensional array of circular holes fabricated in a 30-nm-thick SiO2 film on a GaAs(001) substrate. The hole diameter ranged from 70to150nm. The small hole diameter and the very thin masking layer stimulated lateral growth over the SiO2 surface at an early stage of selective epitaxy on this patterned substrate. Lateral overgrowth associated with selective epitaxy, however, did not proceed isotropically along the circular boundary between the open substrate surface and the SiO2 mask. There was preferential growth direction parallel to ⟨111⟩B. This anisotropy in the selective epitaxy resulted in the formation of a nanoscale, nontapered, straight-wire-type epitaxial layer (GaAs nanowires), which had a length of up to 1.8μm for a nominal 200nm deposition. Every GaAs nanowire had a hexagonal prismatic shape directed along ⟨111⟩B and was surrounded by six (110) sidewalls. The anisotropy of selective epitaxy and faceting in NPG were affected by the profile of the SiO2 mask and are interpreted using a minimization of the total surface energy for equilibrium crystal shape.

The incorporation of In on the non-polar, piezoelectric-free (001) facet of cubic (c-) GaN epitaxially grown over a Si(001) substrate by metal-organic vapor phase epitaxy is reported. Relying on a hexagonal (h-) to c-phase transformation during epitaxy on an 800 nm-wide, Si(111)-faceted v-groove patterned into the substrate, the GaN epilayer at cross sectional view retains a triangular c-phase inside a chevron-shaped h-phase that results in a top surface bounded by a (001) facet parallel to Si(001) at the center and (11¯01) facets at both edges. A stack of five, ∼3 nm-thick, InxGa1−xN/GaN quantum wells (QWs) was deposited on the double-phased top surface. The c-phase region up to the QWs keeps extremely small misfit (∼0.002) to the fully relaxed h-GaN underneath it and is in tensile stress implying undefected by the h-c phase interface. The In incorporation on a strained non-polar (001) of c-GaN is comparable with that on totally relaxed semi-polar (11¯01) of h-GaN without noticeable adatom migration across the phase boundary, and sufficient to provide the room-temperature green emission at 496 nm from the c-InxGa1−xN/GaN QWs on Si(001) in photoluminescence.

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An atomic-scale phase transition in heterophase epitaxy (HPE) of GaN on a 900 nm-wide v-grooved Si(001) substrate is reported. Two different incorporation mechanisms of adatoms sequentially occur for the hexagonal (h-) to cubic (c-) phase transition: orientation-and phase-dependent incorporation (ODI and PDI). Epitaxy begins with ODI that results in preferential growth of h-GaN individually aligned to opposing Si(111) facets inside a v-groove but incurs a structural instability by crystallographic mismatch at the groove bottom. This instability is relieved by an abrupt transition to c-phase, initiating from single or multiple atomic sites uniquely arranged atop the mismatch along the groove. Epitaxy proceeds with PDI that allows μm-scale c-GaN extended from these sites while suppressing growth of h-GaN. An important condition for HPE and the stability of c-GaN in further growth is derived from equilibrium crystal shape.

The initial stages of the nucleation of cubic (c-) GaN in heterophase epitaxy on a Si v-groove are investigated. Growth of GaN on a nanoscale {111}-faceted v-groove fabricated into a Si(001) substrate proceeds in the hexagonal (h-) phase that induces a secondary v-groove replicating the substrate topography with two opposing {0001} facets. The secondary v-groove is then orientationally mismatched at the junction of the h-GaN facets (h-h junction) resulting in structural instability. This instability is relieved either by the formation of voids that reduce the actual junction area or by the transition to c-phase (h-c transition) suppressing further extension of the h-h junction. The distribution of voids that is locally affected by the island growth mode of h-GaN on Si(111) and the imperfection in the groove geometry impacts the initial stage of heterophase epitaxy. Primarily, The h-c transition is observed as a non-local phenomenon; it occurs homogeneously and simultaneously along the bottom of the entire secondary groove and forms a one-dimensional (1D) seed layer except for some interruptions where the h-h junction is defected by gaps or incomplete voids. Between these interruptions, epitaxy retains a single crystal but results in a series of c-GaN nanodots on the seed layer with large fluctuation in size and spacing. The adatom incorporation observed in this heterophase epitaxy is a 1D analog to the wetting of a substrate followed by the self-assembly in conventional quantum dot epitaxy. The surface morphology of the c-GaN nanodots is governed by the faceting mostly composed of (001)and (11n)-orientations and the roughening between these facets that ultimately affect the morphology of the final top surface of the c-III-N. The interruptions interfere with the homogeneity of the h-c transition and can cause antiphase defects and mosaicity. Based on experimental results, a solution to improve these issues is proposed.

Lithography-free, nanoscale patterned, molecular beam epitaxial growth of GaAs on Si is demonstrated on a Si(001) substrate coated with a dense, single-particle-high, stack of ∼80-nm-diameter silica nanoparticles (NPs). The NP stack plays the role of a high aspect ratio, deep sub-100 nm opening area SiO2 pattern which is small enough for nanoscale patterned growth of large lattice-mismatched heterostructures. The GaAs, selectively grown through the interparticle spaces, proceeds over the NP stack initially with island formation and ultimately buries the NP stack by epitaxial lateral overgrowth and coalescence. X-ray diffraction confirms that the GaAs grown over the NP stack has highly improved crystallinity as compared with a reference growth on unpatterned Si. This is explained by necking of the defects propagating along {111} by the small opening, high aspect ratio characteristic of the NP stack.

The top-down fabrication of an in-plane nanowire (NW) GaAs metal-oxide-semiconductor field-effect transistor (MOSFET) with a trigate oxide implemented by liquid-phase chemical-enhanced oxidation (LPCEO) is reported. A 2 μm long channel having an effective cross section ∼70 × 220 nm(2) is directly fabricated into an epitaxial n (+)-GaAs layer. This in-plane NW structure is achieved by focused ion beam (FIB) milling and hydrolyzation oxidation resulting in electronic isolation from the substrate through a semiconductor-on-insulator structure with an n (+)-GaAs/Al2O3 layer stack. The channel is epitaxially connected to the μm-scale source and drain within a single layer for a planar MOSFET to avoid any issues of ohmic contact and LPCEO to the NW. To fabricate a MOSFET, the top and the two sidewalls of the in-plane NW are oxidized by LPCEO to relieve the surface damage from FIB as well as to transform these surfaces to a ∼15 nm thick gate oxide. This trigate device has threshold voltage ∼0.14 V and peak transconductance ∼35 μS μm(-1) with a subthreshold swing ∼150 mV/decade and on/off ratio of drain current ∼10(3), comparable to the performance of bottom-up NW devices.