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The shifting trends in software systems from custom, built to specification, and homogeneous to object oriented and component based have necessitated the development of new approaches for their analysis and evaluation. Correspondingly, the last few years have seen a number of architecture-based techniques employing analytical methods, simulation, and experimentation to characterize the behavior of such systems. Whereas most of the previously reported efforts were focussed on the evaluation of software systems using architecture-based techniques, the utility of these techniques in the design phase to evaluate a set of competing alternatives remains largely unexplored. In this paper we develop an optimization framework founded on the architecture-based analysis techniques, and describe how the framework can be used to evaluate cost and reliability tradeoffs using a genetic algorithm. The choice of genetic algorithms as the underlying optimization technique is motivated by three facts, namely, a potentially large and discontinuous search space, usually nonlinear but monotonic relation between the cost and reliability of individual modules comprising the software, and complex software architectures giving rise to nonlinear dependencies between individual module reliabilities and the overall system reliability. We conclude the paper by illustrating the framework with several examples.

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We describe a technique to estimate the energy consumed by speed-independent asynchronous (clockless) control circuits. Because speed-independent circuits are hazard-free under all possible combinations of gate delays, we prove that an accurate estimate of their energy consumption is independent of relative component gate delays and can be determined by simulating only a small number of input patterns proportional to the size of the circuit's Signal Transition Graph (STG) specication. Specically, w e calculate the average energy per external signal transition consumed by a circuit. This can be used to compare the energy consumption between two dierent circuit implementations of the same specication, to calculate average energy for a given high-level operation, and to provide average circuit power when combined with delay information.

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