A technique to extract trap states at the oxide-silicon interface and grain boundary has been developed for polycrystalline silicon thin-film transistors with large grains. From the capacitance-voltage characteristic, the oxide-silicon interface traps can be extracted. Potential and carrier density are also extracted. From the potential, carrier density, and current-voltage characteristic, the grain boundary traps can be extracted by considering the potential barrier at the grain boundary. Since these trap states are sequentially extracted, any shape of energy distribution of the trap states can be extracted. The correctness of this extraction technique is confirmed by comparison with two-dimensional device simulation.
Polycrystalline silicon films were deposited at a substrate temperature of 300 °C by electron cyclotron resonance SiH4/H2 plasma-enhanced chemical vapor deposition. The effects of substrate dc bias during deposition on the crystallinity and the surface roughness of the deposited films were investigated in the range from −150 to +50 V by using x-ray diffraction, scanning electron microscopy, and atomic force microscopy. It was found that the positive biases applied to the substrate improved the crystallinity and the surface roughness. To clarify the substrate dc bias effects on the crystallinity and the surface roughness, the sheath potential, ion current, and temperature on the substrate surface were measured. It is determined that improvement of the crystallinity and the surface roughness is due to the decrease of ion flux to the substrate when positive bias is applied to the substrate.
Trap states at the oxide-silicon interface and grain boundary in laser-crystallized polycrystalline-silicon thin-film transistors were extracted. The oxide-silicon interface traps and grain boundary traps can be extracted using the low-frequency capacitance–voltage characteristic and current–voltage characteristic, respectively. The traps above and below the midgap can be extracted using n-type and p-type transistors, respectively. The oxide-silicon interface traps consist of deep states and therefore seem to be caused by dangling bonds. The grain boundary traps consist of tail states and therefore seem to be caused by distortion of silicon-silicon bonds. Moreover, degradation by self-heating was analyzed. The oxide-silicon interface traps increase after the degradation. This means that silicon-hydrogen bonds are dissolved, and dangling bonds are generated. The grain boundary traps also increase a little.
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