To support the feasibility of an all-Si tandem solar cell based on quantum confined Si nanowires, we investigate the diameter reduction of nanowires by thermal oxidation. As a starting point, 6 × 6 mm 2 arrays of vertical nanowires with a 90-nm pitch were made by DUV lithography and anisotropic reactive ion etching. These arrays are subsequently oxidized at temperatures ranging from 825 • C to 1150 • C. The lower temperature oxidation results in retarded oxidation kinetics, as expected. An unexpected gradual necking and undercutting of the nanowires is however observed for all oxidation temperatures. The effect of temperature on the stress buildup is investigated by process simulation and an eventual solution to the necking problem is found in a two-step oxidation process. This process consists of stopping the oxidation before any necking occurs and removing the oxide before further oxidizing the nanowires to obtain the desired core diameter.In the field of photovoltaics the goal of ongoing research is the reduction of the cost per Watt peak. This battle can be fought on two fronts: either a reduction in cost (for instance by a reduction in highly purified silicon through the use of thinner wafers) or an increase in efficiency. This increase in efficiency has a theoretical maximum generally known as the Shockley-Queisser limit. For a crystalline Si device with a single p-n junction under AM1.5 illumination this theoretical efficiency limit is about 30%. 1 When a crystalline Si (Eg = 1.12 eV) bottom cell is combined with a top cell with a bandgap around 1.7-1.8 eV in a tandem cell structure, this efficiency limit can be increased to about 40%. 1 To make this device entirely in Si would avoid the use of costly materials such as III-V semiconductors. Current all-Si tandem cells are either based on a-Si or Si quantum dots as high-bandgap Si material. The Si quantum dot approach was initially proposed by Green et al. 2 Si quantum dots were embedded in a dielectric matrix and were shown to have an increased bandgap varying with the size of the quantum dots. This approach has been popular thanks to the relative simplicity of the fabrication of quantum dots. Both materials, however, have drawbacks for obtaining high currents. In the a-Si (micromorph) approach, the short-circuit current of the cell is limited by the poor quality of the material of the top-cell. The drawback of the quantum dot approach is the need to tunnel through the dielectric matrix in-between dots to drive the current to the electrodes and the resulting sensitivity of the device to dot and barrier size and size distribution. Therefore we propose an alternative embodiment (see Figure 1) making use of quantum wires. Our approach is to engineer the bandgap of Si by 2D-quantum confinement in very thin Si nanowires to create a higher bandgap c-Si material. The last dimension is not confined to allow the current to flow. For a proof of concept the initial synthesis relies on lithography and dry etching, although this will obviously have to be replaced by co...
For future 4-junction Ge based multi-junction solar cells, the current generated in the Ge sub-cell gets very important. We developed an efficient rear-side passivation stack, which results in minority carrier lifetimes (τ eff ) ≈ 200 µs and investigated its performance in an accelerated aging experiment (1 MeV electron irradiation). The aging caused a strong lifetime decrease down to τ eff = 4 µs, whereas the carrier mobility stayed constant. These experimental values provide the basis for Beginning-of-Life and End-of-Life solar cell simulations, which show that the potential of the rear-side passivation for 3-junction solar-cell performance is limited, but very promising for 4junction solar cells.
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