Low-temperature atomic layer deposition (ALD) was employed to deposit Al 2 O 3 as a gate dielectric in amorphous In-Ga-Zn-O thin-film transistors fabricated at temperatures below 120 C. The devices exhibited a negligible threshold voltage shift (DV T) during negative bias stress, but a more pronounced DV T under positive bias stress with a characteristic turnaround behavior from a positive DV T to a negative DV T. This abnormal positive bias instability is explained using a two-process model, including both electron trapping and hydrogen release and migration. Electron trapping induces the initial positive DV T , which can be fitted using the stretched exponential function. The breakage of residual AlO-H bonds in low-temperature ALD Al 2 O 3 is triggered by the energetic channel electrons. The hydrogen atoms then diffuse toward the In-Ga-Zn-O channel and induce the negative DV T through electron doping with power-law time dependence. A rapid partial recovery of the negative DV T after stress is also observed during relaxation. V