Near ballistic n-type single-walled carbon nanotube field-effect transistors (SWCNT FETs) have been fabricated with a novel self-aligned gate structure and a channel length of about 120 nm on a SWCNT with a diameter of 1.5 nm. The device shows excellent on- and off-state performance, including high transconductance of up to 25 microS, small subthreshold swing of 100 mV/dec, and gate delay time of 0.86 ps, suggesting that the device can potentially work at THz regime. Quantitative analysis on the electrical characteristics of a long channel device fabricated on the same SWCNT reveals that the SWCNT has a mean-free-path of 191 nm, and the electron mobility of the device reaches 4650 cm(2)/Vs. When benchmarked by the metric CV/ I vs Ion/Ioff, the n-type SWCNT FETs show significantly better off-state leakage than that of the Si-based n-type FETs with similar channel length. An important advantage of this self-aligned gate structure is that any suitable gate materials can be used, and in particular it is shown that the threshold voltage of the self-aligned n-type FETs can be adjusted by selecting gate metals with different work functions.

While it has been shown that scandium (Sc) can be used for making high-quality Ohmic contact to the conduction band of a carbon nanotube (CNT) and thus for fabricating high-performance n-type CNT field effect transistors (FETs), the cost for metal Sc is currently five times more expensive than that for gold and one thousand times more expensive than for yttrium (Y) which in many ways resembles Sc. In this Letter we show that near perfect contacts can be fabricated on single-walled CNTs (SWCNTs) using Y, and the Y-contacted CNT FETs outperform the Sc-contacted CNT FETs in many important aspects. Low-temperature measurements on Y-contacted devices reveal that linear output characteristics persist down to 4.3 K, suggesting that Y makes a perfect Ohmic contact with the conduction band of the CNT. Self-aligned top-gate devices have been fabricated, showing high performance approaching the theoretical limit of CNT-based devices. In particular a room temperature conductance of about 0.55G(0) (with G(0) = 4e(2)/h being the quantum conductance limit of the SWCNT), threshold swing of 73 mV/decade, electron mobility of 5100 cm(2)/V.s, and mean free length of up to 0.639 mum have been achieved. Gate length scaling behavior of the Y-contacted CNT FETs is also investigated, revealing a more favorable energy consumption and faster intrinsic speed scaling than that of the Si-based devices.

Compared with carbon nanotubes and graphene, graphene oxide (GO) exhibits excellent water solubility and biocompatibility in addition to the characteristic G band in Raman spectra. Therefore GO might be able to act as a flexible Raman probe to image cells or tissues through Raman mapping. However, the weak intensity of the G band restricts such applications of GO. Here we decorated GO with Au nanoparticles and found that the Raman intensity of GO in aqueous dispersions were remarkably enhanced by the surface enhancement effect. Therefore, rapid Raman imaging for Hela 229 cells was realized using Au/GO hybrids as Raman probes. The cell internalization mechanism of GO and Au/GO hybrids were also studied using Raman imaging. An endocytosis pathway was proposed from the results. In addition, the aqueous dispersions of Au/GO hybrids are stable for several weeks. Therefore, relying on the surface enhancement effect of Au nanoparticles, GO exhibits great potential as a general Raman imaging tool for biosystems.

Direct growth of single-walled carbon nanotubes (SWNTs) on flat substrates by chemical vapor deposition (CVD) is very important for the application of SWNTs in nanodevices. In the growth process, catalysts play an important role in controlling the structure of SWNTs. Over the years, we have systematically studied the size-controlled synthesis of Fe-based nanoparticles and the CVD growth of SWNTs, especially the horizontally aligned SWNTs, catalyzed by these produced nanoparticles. Some new catalysts were also developed. Among them, Cu is shown to be a superior catalyst for growing SWNT arrays on both silicon and quartz substrates and Pb is a unique catalyst from which one can obtain SWNTs without any metallic contaminant. SWNTs prepared with both Cu and Pb are very suitable for building high-performance nanodevices. These studies are also very helpful for further understanding the growth mechanism of SWNTs.

Single-walled carbon nanotubes (SWCNTs) have been extensively studied since they were discovered by Iijima in 1991, [1] and in particular many SWCNT-based electrical devices have been fabricated and evaluated. [2,3] These devices include field-effect transistors (FETs) [4][5][6][7][8] and diodes. [9][10][11][12][13][14] When contacted with Pd and Sc, [7,15] it has been shown that carriers can be injected, barrier-free, into the valence band (p-FET) [7] and conduction band (n-FET), [15] respectively, forming the basis for doping-free carbon nanotube (CNT)-based ballistic complementary metal-oxide semiconductor (CMOS) technology.[15] Similar to Si-based CMOS, [16] the CNT-based CMOS inverter (Fig. 1a) forms the simplest and most fundamental unit for more complex CMOS circuits. In this Communication we show, in addition to the usual CMOS inverter functions, that this basic device unit can also be readily configured to function as an effective ambipolar FET [17] and a new type of diode: the barrier-free bipolar diode. Several CNT-based diodes have been developed. These include p-n junction diodes formed by chemical doping [9] and split gates, [10] and Schottky diodes based on intramolecular junctions [11] and metal-CNT junctions. [12][13][14] While the functioning of the p-n junction diode relies on the diffusion of minority carriers in the device, which limits its high-speed applications, [14] the presence of the Schottky barrier (SB) in the Schottky diode significantly reduces the maximum current that may be achieved. In general, the conventional diode may be regarded as unipolar involving only one type of carrier, that is, either electrons or holes.In an earlier report, [15] we demonstrated that a CMOS inverter can be fabricated readily by depositing two Pd electrodes and two Sc electrodes side-by-side on a single CNT lying on the surface of a SiO 2 gate oxide. As shown in Figure 1a, when the two Pd electrodes are used as the source (S) and drain (D), the field effect of the device is characteristic of a p-type FET (see Supporting Information Fig. S1a). When the Sc electrodes are used, the device is characteristic of an n-type FET (see Fig. S1b). When all four electrodes are used, with V OUT ¼ V 2 ¼ V 3 and V IN ¼ V 5 , the device functions as a CMOS inverter (see Fig. S1c).It should be noted that in the Si-based CMOS inverter the conduction channel of the n-FET is isolated from that of the p-FET.[16] In the CNT-based inverter shown in Figure 1a, both p-and n-FETs share the same conduction channel, that is, the CNT. The n-FET can be isolated from the p-FET readily by cutting or etching away the CNT segment between the V 2 and V 3 electrodes, but Figure S1 demonstrates clearly that even though we did not disconnect the n-FET and p-FET we still obtained a high-performing CMOS inverter with a voltage gain of more than 10 and room temperature I on /I off ratios of more than 10 5 for both the p-and n-FETs. More than 30 devices were fabricated on the same CNT, and all of the devices showed almost the same I-V characteri...

An electrically bistable and non-volatile rewritable memory effect on a sandwich architecture, ITO/PEDOT:PSS/organic–inorganic hybrid perovskite/Cu, is shown.

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