To reduce the resource consumption in traditional software IPv6 Internet protocols based on embedded system, a data transmission hardware scenario of reduced IPv6 protocol with optimized cache structures based on the FPGA is designed using Verilog HDL. This scenario implements the function of the Transport Layer and the Network Layer on FPGA and uses the function of the Data Link Layer and the Physical Layer on the DM9000A chip, which can perform stateless auto-configuration, address resolution, echo response and UDP transmission. To improve the transmission efficiency, a low-resource-consumption and self-managed cache structure is designed to manage the Neighbor Cache, the Prefix Table and the Default Router Table. In the IPv6 network test, the design can configure itself and its data rate exceeds 28Mbps, which can realize real-time video stream, audio stream and other data transmission in Network of Things applications in IPv6 network.
A cotton sliver detection sensor is designed, which is different from the traditional roller detection system. Firstly the lever enlarges the change of thickness of cotton sliver into a large amount of displacement, and then the LVDT detects this displacement, and finally the signal transmission module based on AD698 converts the detected signal of the LVDT into a voltage ranging from 0V to 10V. The experiments show that the sensor has good linearity and resolution. The design is not only with lower mechanical inertia and simpler signal processing circuit, but also solving the problem that in the face of processing technologies change, sliver sensor with embossing roller and ladder roller, need to replace the different detection roller.
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