Abstract-We present a fully differential 128-channel integrated neural interface. It consists of an array of 8×16 lowpower low-noise signal recording and generation channels for electrical neural activity monitoring and stimulation, respectively. The recording channel has two stages of signal amplification and conditioning with a programmable gain of 54dB to 73dB, and a fully differential 8-bit column-parallel successive approximation (SAR) analog-to-digital converter (ADC). The design is implemented in a 0.35µm CMOS technology with the channel pitch of 200µm. The total measured power consumption of each recording channel including the SAR ADC is 15.5µW. The measured input referred noise is 6.08µV rms over a 5kHz bandwidth.

Modern biosensors play a critical role in healthcare and have a quickly growing commercial market. Compared to traditional optical-based sensing, electrochemical biosensors are attractive due to superior performance in response time, cost, complexity and potential for miniaturization. To address the shortcomings of traditional benchtop electrochemical instruments, in recent years, many complementary metal oxide semiconductor (CMOS) instrumentation circuits have been reported for electrochemical biosensors. This paper provides a review and analysis of CMOS electrochemical instrumentation circuits. First, important concepts in electrochemical sensing are presented from an instrumentation point of view. Then, electrochemical instrumentation circuits are organized into functional classes, and reported CMOS circuits are reviewed and analyzed to illuminate design options and performance tradeoffs. Finally, recent trends and challenges toward on-CMOS sensor integration that could enable highly miniaturized electrochemical biosensor microsystems are discussed. The information in the paper can guide next generation electrochemical sensor design.

Abstract-We quantify a source of ineffectual computations when processing the multiplications of the convolutional layers in Deep Neural Networks (DNNs) and propose Pragmatic (PRA), an architecture that exploits it improving performance and energy efficiency. The source of these ineffectual computations is best understood in the context of conventional multipliers which generate internally multiple terms, that is, products of the multiplicand and powers of two, which added together produce the final product [1]. At runtime, many of these terms are zero as they are generated when the multiplicand is combined with the zero-bits of the multiplicator. While conventional bit-parallel multipliers calculate all terms in parallel to reduce individual product latency, PRA calculates only the non-zero terms using a) on-thefly conversion of the multiplicator representation into an explicit list of powers of two, and b) bit-parallel multplicand/bit-serial multiplicator processing units.PRA exploits two sources of ineffectual computations: 1) the aforementioned zero product terms which are the result of the lack of explicitness in the multiplicator representation, and 2) the excess in the representation precision used for both multiplicants and multiplicators, e.g., [2]. Measurements demonstrate that for the convolutional layers, a straightforward variant of PRA improves performance by 2.6x over the DaDiaNao (DaDN) accelerator [3] and by 1.4x over STR [4]. Similarly, PRA improves energy efficiency by 28% and 10% on average compared to DaDN and STR. An improved cross lane synchronization scheme boosts performance improvements to 3.1x over DaDN. Finally, Pragmatic benefits persist even with an 8-bit quantized representation [5].

Fabien Alibart received a Ph.D. in material science from University of Picardie Jules Verne, France, in 2008. He joined IEMN-CNRS in 2012 as a permanent researcher where he worked on the concepts of neuromorphic/bioinspired computing with emerging memory technologies. He is now with LN2-3IT CNRS as a researcher participating in the join laboratory program between France and Quebec (UMI-CNRS) where he is developing neuromorphic hardware for a variety of applications, from edge computing to brain-machine interfaces.

A 3D microsystem for multi-site penetrating extracellular neural recording from the brain is presented. A 16 16-channel neural recording interface integrated prototype fabricated in 0.35 m CMOS occupies 3.5 mm 4.5 mm area. Each recording channel dissipates 15 W of power with input-referred noise of 7 V rms over 5 kHz bandwidth. A switched-capacitor delta read-out data compression circuit trades recording accuracy for the output data rate. An array of 1.5 mm platinum-coated microelectrodes is bonded directly onto the die. Results of in vitro experimental recordings from intact mouse hippocampus validate the circuit design and the on-chip electrode bonding technology.

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We assess and compare the effects of both closed-loop and open-loop neurostimulation of the rat hippocampus by means of a custom low-power programmable therapeutic neurostimulation device on the suppression of spontaneous seizures in a rodent model of epilepsy. Chronic seizures were induced by intraperitoneal kainic acid injection. Two bipolar electrodes were implanted into the CA1 regions of both hippocampi. The electrodes were connected to the custom-built programmable therapeutic neurostimulation device that can trigger an electrical stimulation either in a periodic manner or upon detection of the intracerebral electroencephalographic (icEEE) seizure onset. This device includes a microchip consisting of a 256-channel icEEG recording system and a 64-channel stimulator, and a programmable seizure detector implemented in a field-programmable gate array (FPGA). The neurostimulator was used to evaluate seizure suppression efficacy in ten epileptic rats for a total of 240 subject-days (5760 subject-hours). For this purpose, all rats were randomly divided into two groups: the no-stimulation group and the stimulation group. The no-stimulation group did not receive stimulation. The stimulation group received, first, closed-loop stimulation and, next, open-loop stimulation. The no-stimulation and stimulation groups had a similar seizure frequency baseline, averaging five seizures per day. Closed-loop stimulation reduced seizure frequency by 90% and open-loop stimulation reduced seizure frequency by 17%, both in the stimulation group as compared to the no-stimulation group.