Abstract-XOR and XNOR gate plays an important role in digital systems including arithmetic and encryption circuits. This paper proposes a combination of XOR-XNOR gate using 6-transistors for low power applications. Comparison between a best existing XOR-XNOR have been done by simulating the proposed and other design using 65nm CMOS technology in Cadence environment. The simulation results demonstrate the delay, power consumption and power-delay product (PDP) at different supply voltages ranging from 0.6V to 1.2V. The results show that the proposed design has lower power dissipation and has a full voltage swing.
Powering active implantable devices is challenging.Implants must be small and have a long lifetime. Wireless power offers energy over the life of the device. Using integrated circuits for managing wireless power transfer allows for a small implant. Often when implemented in CMOS, a synchronous rectifier is used to achieve AC-DC conversion. Current spikes can occur in the rectifier and must be considered to avoid electromigration. This paper presents the analysis of the peak currents in the synchronous rectifier. Reducing the peak current can be achieved by decreasing the size of the rectifying transistors. We have developed and fabricated the control circuitry for a synchronous rectifier in XFABs XH018 180nm high voltage CMOS process. A finalised synchronous rectifier is being designed which will be used to confirm our analysis.
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