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An Elman network is used for the prediction of material removal rate (MRR) in electrical discharge machining (EDM). An Elman network is a dynamic recurrent neural network that can be used to model non-linear dynamic systems. Training of the models is performed with data from series of EDM experiments on AISI D2 tool steel from finishing, semi-finish to roughing operations. The machining parameters such as discharge current, pulse duration, duty cycle, and voltage were used as model input variables during the development of predictive models. The developed model is validated with a new set of experimental data that was not used for the training step. The mean percentage error of the model is found to be less than 6 per cent, which shows that the proposed model can satisfactorily predict the MRR in EDM.

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In this work, two different artificial neural network (ANN) models -back-propagation neural network (BPN) and radial basis function neural network (RBFN) -are presented for the prediction of surface roughness in die sinking electrical discharge machining (EDM). The pulse current (Ip), the pulse duration (Ton), and duty cycle (t) are chosen as input variables with a constant voltage of 50 volt, and surface roughness is the output parameters of the model. A widespread series of EDM experiments was conducted on AISI D2 steel to acquire the data for training and testing and it was found that the neural models could predict the process performance with reasonable accuracy, under varying machining conditions. However, RBFN is faster than the BPNs and the BPN is reasonably more accurate. Moreover, they can be considered as valuable tools for EDM, by giving reliable predictions and provide a possible way to avoid timeand money-consuming experiments.

We developed a dataflow framework which provides a basis for rigorously defining strategies to make use of runtime preprocessing methods for distributed memory multiprocessors.In many programs, several loops access the same off-processor memory locations. Our runtime support gives us a mechanism for tracking and reusing copies of off-processor data. A key aspect of our compiler analysis strategy is to determine when it is safe to reuse copies of off-processor data. Another crucial function of the compiler analysis is to identify situations which allow runtime preprocessing overheads to be amortized. This dataflow analysis will make it possible to effectively use the results of interprocedural analysis in our efforts to reduce interprocessor communication and the need for runtime preprocessing. Accesion For NTIS CRA&