In SDN network based on OpenFlow a controller performs logically centralized control of enterprise network infrastructure, network policies, and data flows. At the same time the controller is a single point of failure which can cause a very serious problem (e.g. network outage) for network reliability and production use cases. To address this problem, we consider different active/standby strategies to provide a controller failover in case of controller failure. We propose a high-available controller (HAC) architecture, which allows to deploy a highavailability control plane for enterprise networks. We develop a HAC prototype to demonstrate the efficiency of our solution and also describe initial experimental results.
A. Typical SDN controller architectureA typical SDN/OpenFlow controller [6, 9, 10 and 11] includes:Controller core which handles and supports connectivity with switches and translates control protocol messages (e.g. OpenFlow) into internal controller events and vice versa.Controller network services which control, form and monitor network view, states of network devices, provide an interface (Northbound API) for controller applications. Usually network services include event dispatching, device managing, topology managing and the others.Controller network applications which configure network infrastructure and manage data flows to solve some business use cases.
Abstract. The results presented here are based on the experience of development and application of DYANA -an environment for analysis of multiprocessor computer systems operation. The architecture and basic features of such an environments are discussed. Main problems of such the environment design are highlighted and possible solutions are shown. The key features of the DYANA environment are: the possibility of both quantitative and algorithmic analysis of system to be modeled; the time complexity estimation subsystem which helps to avoid the instructionlevel simulation of target computer system; support of program development through simulation.
In this paper we present a technology for integration of distributed real-time embedded systems (RTES) based on hardware-in-the loop simulation. The environment to support this technology is described. This environment also enables simulation-based evaluation of RTES architecture on early stages of RTES development.
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