This letter presents two transient enhancement techniques for multi‐path switched‐capacitor‐inductor (MP‐SCI) hybrid DC–DC converters to eliminate the line‐transient‐induced voltage coupling to the converter output. Since the existing input‐feedforward method is hard to apply to the MP‐SCI converter, the proposed techniques tackle the intrinsic hard‐charging property with the MP‐SCI topology, preventing the line‐coupling current through topology operation reconfiguration and power‐switch modulation. The proposed controller also achieves adaptive line‐transition detection and automatic flying‐capacitor voltage balancing, ensuring a fast line regulation feature. Implemented with an MP‐SCI topology for a 9 to 14 V‐input to 5 V‐output conversion, the proposed control techniques provide an output (VOUT) overshoot and undershoot as low as 0.5% of the output DC level under a 3‐V input voltage step. From the simulation, the corresponding output variation reduction can be more than 94% when compared with the existing MP‐SCI operations. Besides, the proposed controller is compatible with a voltage‐mode (VM) V2 pulse‐width modulation (PWM) function, achieving a fast load‐transient recovery in six switching cycles and a VOUT variation of 75 mV at a 5 V DC level under a 0‐to‐3 A load step. The peak conversion efficiency can be as high as 95.5%, and the targeted load current delivery is up to 3 A.
This paper proposes a direct 12V-to-1V hybrid converter using a switched-capacitor-assisted (SCA) topology, featuring dual-path output current conduction to lower the inductor current. In contrast to the existing dual-path structures, the proposed topology realizes a high step-down conversion with efficiency improvement in heavy-load conditions. Besides, the converter further achieves an efficiency boost in light-load conditions using zero-voltage switching. Designed in a 180-nm SOI BCD process, the proposed converter regulates an output of 0.7~1.3V from a 12-V input with a peak efficiency of 92%. Under a loading current of 2A, it attains an efficiency over 84% at the 1-V output. Compared with the conventional buck, it achieves an improvement of 9.8% in peak efficiency and 13.6% in maximum-loading efficiency.
This work proposes a hybrid DC-DC converter using a multi-path switched-capacitor-inductor (MPSCI) topology. Assisted by switchedcapacitor branches, it features voltage-conversion range extension and inductor power loss reduction, and hence improving the conversion efficiency. Implemented in a 180-nm CMOS process, the proposed converter can regulate an output voltage of 1.8~3.3V from a 5-V input bus voltage using a 4.7μH inductor (DCR = 240mΩ) at a switching frequency of 800 kHz. It achieves a peak conversion efficiency of 93.7% when delivering an output current of 1A. Under a maximum loading of 3A, this design still attains an efficiency of up to 85.8%. Furthermore, in contrast to the existing dual-path and conventional buck topologies, the proposed converter realizes an inductor loss reduction up to 3.3 and 5.4 times, respectively, at the maximum loading conditions.
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