In this paper an existing seven transistor (7T) CMOS SRAM cell stability is measured. N-curve method is used to find the stability of the cell. The stability parameters i.e. Static Voltage Noise Margin (SVNM), Static Current Noise Margin (SINM), Write Trip Voltage (WTV) and Write Trip Current (WTI) are measured by varying temperature and supply voltage. The existing cell has an inbuilt mechanism for charge sharing. This technique .for the write operation. The existing 7T SRAM cell has achieved 22.71% increase in stability as compared to reference cell, which validate the desired design approach.
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