No abstract

This paper proposes the use of barycentric coordinates in the development and implementation of space-vector pulse-width modulation (SVPWM) methods, especially for inverters with deformed spacevector diagrams. The proposed approach is capable of explicit calculation of vector duty cycles, independent of whether they assume ideal positions or are displaced due to the DC-link voltage imbalance. The use of barycentric coordinates also permits a well-defined and universal approach to the problem of identifying the region in which the reference vector is located. It completely avoids the use of angles, trigonometric functions, and inverse trigonometric functions and is chiefly based on matrix operations which are well suited for digital signal processor implementation. The proposed approach is exposed and validated for the special case of three-level neutral-point clamped (NPC) inverter controlled by a discontinuous space-vector PWM.INDEX TERMS Space-vector PWM, three-level NPC inverter, barycentric coordinates.

No abstract

No abstract

The paper puts forth a novel idea for the computation of Nearest Three Virtual Space Vector Pulse Width Modulation for the three level NPC converters. The computations are based on the concept of final element shape function widely used in the domain of finite element analysis. The proposed approach significantly frees the computations from the use of trigonometric functions, which simplifies the computations and permits easier and more effective implementation of the modulation itself and the related functionalities, notably the neutral-point voltage balancing. The active balancing algorithm has no effect on the formation of the converter output voltage.

This paper proposes the generalized direct modulation for Conventional Matrix Converters (CMC) using the concept of analytical signals and barycentric coordinates. The paper proposes a novel approach to the Pulse Width Modulation (PWM) duty cycle computing, which allows faster prototyping of direct control algorithms. The explanation of the new idea using analytical considerations demonstrating the principles of direct voltage synthesis has been presented in the article. The study concerns mainly the CMC3 × 3 but solutions for 3 × n, 5 × 5, and 5 × 3 topologies have also been discussed. The transformation of instantaneous input voltages to analytic signals great permits for simple presenting of real input voltage conditions such as waveform type, asymmetry or other deformation like higher-order harmonics. The proposed interpolation methods allow for determining the values of PWM duty cycles using simple formulas based on the determinants of the 2nd-degree matrices. Therefore, the proposed method, which based on the barycentric coordinates, frees an algorithm from trigonometry and angles.

No abstract

This article presents three variants of the Pulse Width Modulation (PWM) for the Double Square Multiphase type Conventional Matrix Converters (DSM-CMC) supplying loads with the open-end winding. The first variant of PWM offers the ability to obtain zero value of the common-mode voltage at the load’s terminals and applies only six switches within the modulation period. The second proposal archives for less Total Harmonic Distortion (THD) of the generated load voltage. The third variant of modulation concerns maximizing the voltage transfer ratio, minimizing the number of switching, and the common-mode voltage cancellation. The discussed modulations are based on the concept of sinusoidal voltage quadrature signals, which can be an effective alternative to the classic space-vector approach. In the proposed approach, the geometrical arrangement of basic vectors needed to synthesize output voltages is built from the less number of vectors, which is equal to the number of the matrix converter’s terminals. The PWM duty cycle computation is performed using only a second-order determinant of the voltages coordinate matrix without using trigonometric functions. A new approach to the PWM duty cycles computing and the load voltage synthesis by 5 × 5 and 12 × 12 topologies has been verified using the PSIM simulation software.