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A linear CMOS VI-converter operating in strong inversion with a commonmode input range from the negative to the positive supplly rail is presented. The circuit consists of three linear VI-converters based on the difference of squares principle [l-31. Two of these perform the actual V to I conversion, while the third changes the bias currents of the first two in response to changes in the input common-mode level.The resulting circuit has a large signal transconductance which is constant to within 3 % over the entire common-mode input range. It can operate from a single supply voltage of 2.2Volt.s.

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This paper describes the results of an implementation of a Bluetooth radio in a 0.18-m CMOS process. A low-IF image-reject conversion architecture is used for the receiver. The transmitter uses direct IQ-upconversion. The VCO runs at 4.8-5.0 GHz, thus facilitating the generation of 0 and 90 signals for both the receiver and transmitter. By using an inductor-less LNA and the extensive use of mismatch simulations, the smallest silicon area for a Bluetooth radio implementation so far can be reached: 5.5 mm 2. The transceiver consumes 30 mA in receive mode and 35 mA in transmit mode from a 2.5 to 3.0-V power supply. As the radio operates on the same die as baseband and SW, the crosstalk-on-silicon is an important issue. This crosstalk problem was taken into consideration from the start of the project. Sensitivity was measured at 82 dBm.

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This paper describes a low power, high performance double conversion WiBro/WiMAX 802.16e radio transceiver optimized for mobile applications and coexistence with on-board Cellular and WLAN/Bluetooth systems. It is fabricated in a SiGe BiCMOS process and achieves a receiver NF of less than 2.5dB at an operation frequency of 2.35GHz. The transmit gain can be digitally tuned over a 75dB range. The transceiver consumes 125/135mA at a 2.8V supply in OFDMA Rx/Tx modes respectively.

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