Multistage Interconnection Networks (MINs) play a vivacious position to perform high performance within the discipline of VLSI, broadband communications, parallel and distributed systems designs. The problem of fault tolerance and cost effectiveness are the predominant challenges for calculating the overall performance of MINs. A MIN is better fault tolerant, if it may deal with the extra faults come across in different stages. The fault tolerance of proposed Modified Irregular Augmented Shuffle Exchange Network (MIASEN) [13] is examined in terms of bandwidth, processor utilization, throughput, probability of acceptance, and processing power. The performance and evaluation analysis indicates that the MIASEN is more fault tolerant than the existing Modified Alpha Network (MALN).
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