Abstract-An -symbol discrete Fourier transform ( -DFT) processor based on analog CMOS current mirrors that operate in the strong inversion region is presented. It is shown that transistor mismatch can be modeled as an input-referred noise source that can be used in system-level studies. Simulations of a radix-2, 256-symbol fast Fourier transform (FFT) show that the model produces equivalent results to those of a model that incorporates a mismatch term into each current mirror. It is shown that in general, high-radix FFT structures and specifically the full-radix DFT have reduced sensitivity to mismatch and a reduced number of current mirrors compared to radix-2 structures and have some key advantages in terms of transistor count with respect to comparable digital implementations. Simulations of an orthogonal frequency-division multiplexing system with forward error control coding, that take into account current mirror nonidealities such as mismatch, show that an analog DFT front end loses only 0.5 dB with respect to an ideal circuit.

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A high-temperature amplifier, designed and simulated in a 0.13 μm CMOS process, is presented. The amplifier is intended to operate in a wood chip digester used for pulp manufacture in which the ambient temperature can be as high as 180 • C. Since the foundry provided modeled are valid up to 125 • C, the amplifier along with its bias circuitry is simulated up to 125 • C by considering a reasonable margin for the gain and gain bandwidth when temperature increases beyond 125 • C.At 125 • C, the amplifier has a DC gain of 69 dB, phase margin of 86 • and unity gain bandwidth of 4.13 MHz, while consuming 0.62 mW (excluding the bias circuitry) from a 2.5 V supply.

A technique for implementing monolithic resistors with near-zero temperature coefficient (NZ-TC) over a wide temperature range is presented. The typical structure of monolithic resistors contains a core resistor that is connected to the circuit interconnects through contacts. Typically, the temperature behaviour of contact resistors is ignored, however, we show that one can take advantage of contact resistors and their temperature dependancy to control/minimize the temperature coefficient (TC) of the overall resistor structure. As a proof of concept several resistor structures have been implemented in a 0.13-μm CMOS technology. The measurement results over the temperature range of 25 to 200 • C confirm the validity of the proposed technique. The temperature performance of the implemented resistors is compared with that of conventional resistors. Without loss of generality, the proposed approach can be used to implement a resistor with a given temperature coefficient.

A technique for implementing monolithic resistors with a desired temperature coefficient (TC) over a wide temperature range is introduced. A typical monolithic resistor consists of a core resistive layer terminated with contact layers on each end. In a typical process, there are core resistive layers that have TCs with opposite sign of that of the contacts. The authors propose to take advantage of this property and distribute a certain number of contacts across the core resistor to achieve a desired overall TC for monolithic resistors. This TC can be negative, zero or positive. The methodologies for designing such resistors are presented. As a proof-of-concept, several resistor structures have been designed and implemented in a 0.13 μm complementary metal-oxide semiconductor technology. The simulation and measurement results over the temperature range of 25-200°C confirm the validity of the proposed technique.

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