16Abstract-In this paper, the performance of a 45nm 1 7 Double Gate Metal Oxide Semiconductor Field Effect 18 Transistor (DG-MOSFET) has been analyzed at different 19 channel doping concentrations. The characteristic curves have been studied and parameters such as threshold voltage, 20 leakage current, ON-state current and output conductance 21 (gd) have been extracted and compared for channel doping 22 concentration varying from lxlO l6 cm-3 to 2xlO l8 cm-3 • The 23 drain bias has been increased from lOmV to IV to study the 24 effect of Drain Induced Barrier Lowering (DIBL) at various 25 channel doping concentrations. Furthermore, subthreshold 26 swing and ION IIoFF ratios have been studied as they are crucial 2 7 parameters for a DG-MOSFETs operation as a switch. Finally, the selection of optimum value of channel doping 28 concentration has been discussed considering trade-offs among 29 switching capability, ON-state current, power requirement and 30 short channel effects such as DIBL and leakage current. The 31 simulation and parameter extraction has been done using 32 ATLAS TM device simulator. 33 34 Keywords-45nm CMOS, channel doping variation, Double Gate MOSFET, Drain Induced Barrier Lowering (DIBL), 35 leakage current, subthreshold swing, output conductance, short 36 channel effects. 3 7 38 I. I NTRODUCTION 39 Metal Oxide Semiconductor Field Effect Transistor 40 (MOSFET) is the basic building block for almost all the 41 circuits used in mobile phones [1], [2], sensors [3], [4], 42 medical instruments [5]-[7], and so on. For the past fifty 43 years Moore's law has been the driving force for technological 44 advancements in integrated circuits industry. Moore's law is 45 predicated on doubling the transistors per square inch on 46 densely integrated circuits every two years. But with evolving 4 7 technology and growing demand of reduction of chip area and 48 lower power requirement, the conventional MOSFET posed a 49 number of problems at shorter channel lengths because of the 50 short channel effects (SCE) which come into picture. The gate 51 length of the MOSFET cannot be reduced beyond a certain 52 limit without causing power loss due to leakage current. This 53 has propelled researchers all over the world to work on 54 alternative technologies like Double Gate MOSFET [8], Fin-55 FET [9], [10], CNTFET [11], Pi and Omega-Gate MOSFETs 56 [12]. One such technology is the Double-Gate MOSFET which 5 7 consists of two gates, top and bottom, to reduce the short 60 61 62 63 64 65 channel effects (SCEs) that occur in a Single-Gate MOSFET. The second gate increases the controllability of drain current through gate voltage. A DG-MOSFET has replaced the conventional MOSFETs in numerous applications [13].This work is an attempt to study the effect of channel doping concentration on various SCEs through extensive TCAD analysis of Double-Gate MOSFET parameters. In this paper, a DG-MOSFET has been implemented with a channel length of 45nm with silicon as the substrate material. Gallium Arsenide (GaAs) can also be used a...
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