A b s t r a c t An experimental and theoretical investigation of signal propagation in high-speed interconnect structures containing perforations in the reference planes is presented. Discontinuities of this type occur in many practical package designs and must be modelled correctly (in the time-domain) in order to account for the additional noise which is introduced on the signal line. To establish valid modeling techniques for this class of interconnects, measurements are made on two custom-designed test structures and compared against results obtained from simulation. The effect of the reference plane discontinuity is studied as a function of signal conductor height for a standard stripline configuration. Two-and three-dimensional parasitic extraction tools, along with full-wave electromagnetic solvers, are used to calculate the discontinuity element values. For both test structures, good correlation is obtained between measurements and modeling results. The value of different modeling approaches is discussed, and design guidelines for practical interconnect structures are proposed.
I. I n t r o d u c t i o n a n d MotivationDue to increases in system speed and density, designers are confronted with several practical problems imposed by interconnect structures. In short, miniaturization can force different types of transmission-line discontinuities. Deviations from an ideal transmission line can be thought of as belonging to one of two categories: (1) the signal conductor departs from the reference plane (e.g. package leads, sockets, and connectors); and (2) the reference plane is not continuous (e.g. mesh planes, isolated ground regions, and multiple supply regions). The first category of discontinuities has been wellcharacterized, and it has been shown that lumped-element models can be used to represent these structures [2],[3],[4]. In this work, a detailed analysis of the effects on signal propagation of reference plane openings is attempted. The intent is to establish which modeling tools and methods can be used to extract equivalent circuits that accurately predict time-domain waveforms in cards, boards, and modules containing reference plane openings. Results to within engineering accuracy are required, with minimum model complexity and analysis time.Two electrical test structures have been designed specifically for this work. These have been constructed with the recognition that TDR measurements of small discontinuities are often difficult. Typically, other discontinuities which are difficult to eliminate from the experimental set-up (such as connectors), can mask the discontinuity reflections one tries to measure. For this reason, a scaled-up model containing a single reference-plane opening was constructed for initial measurements. The second test structure is an actual FR-4 card containing many sma.11 openings in the reference planes. After discerning the general features of the discontinuity from the scaled model, one can more easily isolate and understand the discontinuity effects in realistic stru...
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