down to 0.2 pm have been fabricated in fully depleted, ultrathin (400 hi) silicon-on-insulator (SOI) films. These devices do not exhibit punchthrough, even for the smallest channel lengths, and have performance characteristics comparable to deep-submicrometer bulk transistors. The NMOS devices have a ptpolydoping. The process has been implemented in so1 layers as thin as 4oo A, and enhancement-mode operation is achieved for both transistor types, with threshold voltages of roughly 1 V. Titanium silicide is used to lower the series resistance in silicon gate, and the PMOS devices have an n+-polysilicon gate, giving threshold voltages close to 1 V with very light channel doping. Because the series resistance associated with the source and drain regions can be very high in such thin SO1 films, a titanium salicide process was employed using a 0.25-pm oxide spacer. With this process, the sheet resistance of the silicided SO1 layer is approximately 5 O / O . However, the devices still exhibit significant series resistance, which is likely due to contact resistance between the silicide and silicon source/drain regions.
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