This paper presents the modeling of BPEL (timed) constructs by using a new formalism WS-TEFSM (Web Service Timed Extended Finite State Machine). A formal mapping of all BPEL constructs is proposed as well as a model that corresponds to the BPEL Web services composition. The WS-TEFSM formalism allows to deal with timing constraints, data variables, clocks and priority on transitions.To perform the transformation, we define a renaming function and an asynchronous product of all partial machine corresponding to the BPEL process sub-activities. This model is enriched by the addition of priorities on transitions, which permit to handle the termination of the BPEL process and its sub-activities, and by global variables, which are used in the management of events and faults. This transformation step is essential to ensure the test of Web services. A rigorous approach is crucial as we have to deal with complex systems that manage distribution, lowcoupled nature and asynchronous behaviors.
International audienceBPEL is a standard language for Web services composition. To test a composite Web service, the design of a formal model is very useful, because it facilitates the application and the automatization of test generation methods. In this paper, we propose a transformation procedure of the BPEL specification into an Intermediate Format (IF) model that is based on timed automata. This IF format is well adapted to model BPEL (timed) constructs and to handle faults, events, termination, message correlation and activities synchronization. The proposed transformation was implemented in the BPEL2IF tool, which is also presented in this paper
Mixed-Criticality Systems (MCS) are real-time systems characterized by two or more distinct levels of criticality. In MCS, it is imperative that high-critical flows meet their deadlines while lowcritical flows can tolerate some delays. Sharing resources between flows in Network-On-Chip (NoC) can lead to different unpredictable latencies and subsequently complicate the implementation of MCS in many-core architectures. This paper proposes a new virtual channel router designed for MCS deployed over NoCs. The first objective of this router is to reduce the worst-case communication latency of high-critical flows. The second aim is to improve the network use rate and reduce the communication latency for low-critical flows. The proposed router, called DAS (Double Arbiter and Switching router), jointly uses Wormhole and Store And Forward techniques for low and high-critical flows respectively. Simulations with a cycle-accurate SystemC NoC simulator show that, with a 15% network use rate, the communication delay of high-critical flows is reduced by 80% while communication delay of low-critical flow is increased by 18% compared to usual solutions based on routers with multiple virtual channels. We focus on the implementation of MCS on many-core systems. Network-On-Chips (NoCs) are mandatory in such architectures since they provide scalability, modularity, and communication parallelism.
A Mixed Criticality System (MCS) combines real-time software tasks with different criticality levels. In a MCS, the criticality level specifies the level of assurance against system failure. For high-critical flows of messages, it is imperative to meet deadlines; otherwise, the whole system might fail, leading to catastrophic results, like loss of life or serious damage to the environment. In contrast, low-critical flows may tolerate some delays. Furthermore, in MCS, flow performances such as the Worst Case Communication Time (WCCT) may vary depending on the criticality level of the applications. Then execution platforms must provide different operating modes for applications with different levels of criticality. To conclude, in Network-On-Chip (NoC), sharing resources between communication flows can lead to unpredictable latencies and subsequently turns the implementation of MCS in many-core architectures challenging. In this article, we propose and evaluate a new NoC router to support MCS based on an accurate WCCT analysis for high-critical flows. The proposed router, called Double Arbiter and Switching router (DAS), jointly uses Wormhole and Store And Forward communication techniques for low- and high-critical flows, respectively. It ensures that high-critical flows meet their deadlines while maximizing the bandwidth remaining for the low-critical flows. We also propose a new method for high-critical communication time analysis, applied to Store And Forward switching mode with virtual channels. For low-critical flows communication time analysis, we adapt an existing wormhole communication time analysis with share policy to our context. The second contribution of this article is a multi-abstraction-level evaluation of DAS. We evaluate the communication time of flows, the system mode change, the cost, and four properties of DAS. Simulations with a cycle-accurate SystemC NoC simulator show that, with a 15% network use rate, the communication delay of high-critical flows is reduced by 80% while communication delay of low-critical flow is increased by 18% compared to solutions based on routers with multiple virtual channels. For 10% of network interferences, using system mode change, DAS reduces the high-critical communication delays about 66%. We synthesize our router with a 28nm SOI technology and show that the size overhead is limited of 2.5% compared to the solution based on virtual channel router. Finally, we applied model checking verification techniques to automatically prove several DAS properties required by critical systems designers.
This paper presents the experimental results in applying formal methods to an industrial protocol for constraint-based path computation, called Path Computation Element Communication Protocol (PCEP). The experiments include a number of major activities in model-based testing from modeling to test generation. From the PCEP specification defined by IETF (Internet Engineering Task Force), the functionalities of PCEP are divided into two parts: application and protocol. The protocol part of PCEP is then described in the IF (Intermediate Format) language which is based on communicating timed automata. A number of basic requirements are identified from the PCEP specification and then described as properties in IF. Based on these properties, the validation and verification of the formal specification are carried out using the IF toolset. Test cases are generated using an automatic test generation tool, called TestGen-IF, which uses partial state space exploration guided by test purposes. As a result, some errors and ambiguities have been found in the PCEP standard specification. I. HWANG ET AL. itself, which also means that the requirements are checked for consistency and completeness. Model-based testing usually implies that test cases should be generated automatically from the model, which reduces the cost of test generation. Also, the effectiveness of the tests can be increased for systems that are changed frequently as test cases can be regenerated rapidly by updating the model [5]. Additionally, a number of inconsistencies and ambiguities could be found in the requirements and models when the test cases are generated allowing them to be improved before the software is implemented [6].Recently, there have been a number of industrial case studies on model-based testing. Bozga et al. [7] presented the verification and test generation for the SSCOP protocol and Jia and Graf [8] performed the verification experiments on the MASCARA protocol using IF (Intermediate Format) [9]. Hessel and Pettersson [10] provides model-based testing of a WAP gateway using UPPAAL [11]. The CARRIOCAS project [12] aims at providing a distributed pilot network for industrial applications with high complexity, scope, and scale. A number of hardware and software components are developed in the project in order to provide the connectivity services for such large-scale distributed, data, and computing intensive applications. One of the important activities of the CARRIOCAS project is the validation experiments on the proposed pilot network. As a part of the validation activities, a communication protocol for constraint-based path computation which is called Path Computation Element Communication Protocol (PCEP) [13] has been chosen for validation and verification.This paper presents the experimental results in applying formal methods to PCEP, which is carried out in the CARRIOCAS project. The experiments include a number of major activities in model-based testing from building a model to test generation. From the PCEP specification defined by ...
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