No abstract

Figure S1. Panel (a) shows the J-E data collected for the electrode fabricated with 'enhanced' absorption due to light-trapping elements, in 0.5 M aq. H 2 SO 4 under ELH-type W-halogen solar simulation. Panel (b) shows a cross-sectional SEM image of the same sample. Panel (c) compares the spectral response collected for the sample with light-trapping elements ('enhanced') versus the spectral response for the normal sample. The red response in the 'enhanced' cell is significantly improved. Panel (d) shows the increased J sc with reduced angle dependence, for the enhanced sample compared to the normal sample. Panel (e) shows a digital photograph of a normal Pt/n + p-Si wire-array electrode evolving hydrogen under ~ 1 sun illumination. Small bubbles can be seen nucleating on the wire-array surface. The larger bubbles are stuck on the epoxy, and are the result of the coalescence of many small bubbles. S1

Single-nanowire solar cells were created by forming rectifying junctions in electrically contacted vapor-liquid-solid-grown Si nanowires. The nanowires had diameters in the range of 200 nm to 1.5 microm. Dark and light current-voltage measurements were made under simulated Air Mass 1.5 global illumination. Photovoltaic spectral response measurements were also performed. Scanning photocurrent microscopy indicated that the Si nanowire devices had minority carrier diffusion lengths of approximately 2 microm. Assuming bulk-dominated recombination, this value corresponds to a minimum carrier lifetime of approximately 15 ns, or assuming surface-dominated recombination, to a maximum surface recombination velocity of approximately 1350 cm s(-1). The methods described herein comprise a valuable platform for measuring the properties of semiconductor nanowires, and are expected to be instrumental when designing an efficient macroscopic solar cell based on arrays of such nanostructures.

Silicon wire arrays, though attractive materials for use in photovoltaics and as photocathodes for hydrogen generation, have to date exhibited poor performance. Using a copper-catalyzed, vapor-liquid-solid–growth process, SiCl4 and BCl3 were used to grow ordered arrays of crystalline p-type silicon (p-Si) microwires on p+-Si(111) substrates. When these wire arrays were used as photocathodes in contact with an aqueous methyl viologen2+/+ electrolyte, energy-conversion efficiencies of up to 3% were observed for monochromatic 808-nanometer light at fluxes comparable to solar illumination, despite an external quantum yield at short circuit of only 0.2. Internal quantum yields were at least 0.7, demonstrating that the measured photocurrents were limited by light absorption in the wire arrays, which filled only 4% of the incident optical plane in our test devices. The inherent performance of these wires thus conceptually allows the development of efficient photovoltaic and photoelectrochemical energy-conversion devices based on a radial junction platform.

Arrays of vertically oriented Si wires with diameters of 1.5 m and lengths of up to 75 m were grown over areas Ͼ1 cm 2 by photolithographically patterning an oxide buffer layer, followed by vapor-liquid-solid growth with either Au or Cu as the growth catalyst. The pattern fidelity depended critically on the presence of the oxide layer, which prevented migration of the catalyst on the surface during annealing and in the early stages of wire growth. These arrays can be used as the absorber material in novel photovoltaic architectures and potentially in photonic crystals in which large areas are needed. © 2007 American Institute of Physics. ͓DOI: 10.1063/1.2779236͔Photovoltaic devices designed to achieve high cell efficiency with low-quality materials must have optically thick absorber layers, yet must simultaneously allow efficient collection of low diffusion length charge carriers. An attractive approach involves an array of vertically aligned semiconducting wires to enable carrier collection in the wires' radial direction, a distance that is short relative to their optical thickness ͑i.e. length͒.1 Well-defined wire arrays have been produced using lithographic patterning followed by anisotropic etching, 2,3 but such methods require large areas of high-quality substrate materials. In contrast, wires of various materials 4 have also been grown 'bottom up' by the vaporliquid-solid ͑VLS͒ process.5 Control of the size and position of VLS-grown wires has been demonstrated, 6,7 particularly in the case of Si by patterning of a surface oxide.8-10 Wire array growth, however, has only been achieved over relatively small areas, unless a template is used.11 We demonstrate herein the VLS growth of arrays of Si wires having diameters of 1.5 m and lengths of Ͼ70 m, with very low defect densities, over areas Ͼ1 cm 2 , without the use of a template.Attempts to grow Si wire arrays did not yield high pattern fidelity when the catalyst was not confined. Wires were grown by photolithographically patterning S1813 photoresist ͑Microchem͒ on a clean Si͑111͒ wafer, then exposing it for 5 s to buffered HF͑aqueous͒ ͑Transene, Inc., 9% HF, 32% NH 4 F͒, followed by evaporation of 500 nm of Au and lift-off of the resist. This produced a square array of 3 m diameter Au islands with a center-to-center pitch of 7 m. Samples were then annealed in a tube furnace at 900-1000°C for 20 min under 1 atm of H 2 at a flow rate of 1000 SCCM ͑SCCM denotes cubic centimeters per minute at STP͒, followed by wire growth under 1 atm of H 2 and SiCl 4 , at flow rates of 1000 and 20 SCCM, respectively. This produced arrays of low fidelity, with no control over the wire diameter or wire position ͑not shown͒. Examination of the samples after a 20 min H 2 anneal only revealed that this behavior was due to substantial agglomeration of the catalyst ͑Fig. 1͒.The successful production of large-area Si wire arrays involved the use of an oxide buffer layer to confine the VLS catalyst to the desired areas in the pattern. To implement this approach, a 300 nm oxide was ther...