The microprocessor architecture transition from multi-core to many-core will drive increased chip-to-chip I/O bandwidth demands at processor/memory interfaces and in multi-processor systems. Future architectures will require bandwidths of 200GB/s to 1.0TB/s and will bring about the era of tera-scale computing. To meet these bandwidth demands, traditional electrical interconnect techniques require increases in circuit complexity and costlier materials. However, without lower loss electrical interconnects, this method of increasing I/O bandwidth in electrical links eventually comes at the cost of reducing interconnect link length, reducing signal integrity or increasing power consumption. Optical interconnect with its terahertz bandwidth, low loss, and low cross-talk has been proposed to replace electrical interconnect between chips [1]. This paper describes results for both near and long-term chip-to-chip optical interconnect architectures.The near-term approach is a single package "hybrid" implementation [2] which avoids complex chip carrier packaging [3] and uses CMOS optical transceivers that are compatible with future integration in a microprocessor or logic die. Figure 28.1.1 shows the hybrid optical I/O package architecture that allows for up to 12 optical transmit or receive channels per optical connector. Linear 1×12 arrays of GaAs VCSELs and detectors are flip-chip bonded to the package substrate and polymer waveguides with 45°mirrors are embedded in the package substrate. In order to obtain adequate electrical signal integrity, the high-speed lines, which connect the VCSEL (photodiode) bumps to the transceiver chip's I/O bumps, are routed on the substrate surface as controlled 50Ω impedance microstrip traces. This avoids impedance discontinuities, while the close proximity between the transceiver chip and the optical elements minimizes frequency dependent loss. Power and bias planes are incorporated into the substrate to bias the optical elements.An 8 channel prototype chip, shown in Fig. 28.1.7, was implemented in 90nm CMOS and includes 16 cells with VCSEL drivers, TIA receivers, and clock-data recovery ( Fig. 28.1.2), which can be configured individually as optical TX/RX. The fully packaged prototype achieves open transmit and receive eye diagrams at up to 10Gb/s (Fig. 28.1.3). Higher data rates are possible with a combination of future packaging refinements aimed at reducing TIA input capacitance and circuit techniques, which extend VCSEL bandwidth. Electrical probe measurements of the TIA, which uses cross-coupled cascodes to boost gain and bandwidth [4], yields open eye diagrams at 12.5Gb/s and 18Gb/s with input capacitance of 260fF and 90fF, respectively. Implementing sub-bit interval pre-emphasis in the transmitter [4] allows for 18Gb/s operation with 122% vertical and 76% horizontal eye opening improvement with a 10Gb/sclass VCSEL. The optical receiver and driver energy efficiency is 11pJ/b at 10Gb/s, including the 38mW TIA/limiting amplifier and a reduced power 72mW transmitter that excludes pr...
Humor is a unique and creative communicative behavior often displayed during social interactions. It is produced in a multimodal manner, through the usage of words (text), gestures (visual) and prosodic cues (acoustic). Understanding humor from these three modalities falls within boundaries of multimodal language; a recent research trend in natural language processing that models natural language as it happens in face-to-face communication. Although humor detection is an established research area in NLP, in a multimodal context it has been understudied. This paper presents a diverse multimodal dataset, called UR-FUNNY, to open the door to understanding multimodal language used in expressing humor. The dataset and accompanying studies, present a framework in multimodal humor detection for the natural language processing community. UR-FUNNY is publicly available for research.
Purpose: This study aims to empirically examine the immediate reaction of affected countries' stock market indices to COVID-19. Approach/Methodology/Design: The study applies an event study methodology using daily data series of stock price indices. Findings: Evidence from eleven global stock market indices shows that the first confirmed COVID-19 case announcement has had a significant negative impact on the returns. Moreover, these effects were more substantial following the WHO announcement of COVID-19 as a global pandemic on March 11, 2020. Practical Implications: The rapidly developing outbreak of the COVID-19 pandemic has depressed the affected countries' economies and caused turmoil in global financial markets. The results presented in this paper shed some light on the potential economic and social cost of COVID-19 concerns policymakers and other stock market stakeholders. Originality/value: The results suggest that stock markets have captured investors' expectations over potential adverse economic consequences of COVID-19. Moreover, there is evidence for an underreaction to the pandemic's announcement, as shown by the delayed response of stock markets in terms of significant CARs. These findings leave a wish list of topics for future research.
No abstract
scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.
hi@scite.ai
10624 S. Eastern Ave., Ste. A-614
Henderson, NV 89052, USA
Copyright © 2024 scite LLC. All rights reserved.
Made with 💙 for researchers
Part of the Research Solutions Family.