In this study, a novel structure for cascade multilevel inverter is presented. The proposed inverter can generate all possible DC voltage levels with the value of positive and negative. The proposed structure results in reduction of switches number, relevant gate driver circuits and also the installation area and inverter cost. The suggested inverter can be used as symmetric and asymmetric structures. Comparing the peak inverse voltage and losses of the proposed inverter with conventional multilevel inverters show the superiority of the proposed converter. The operation and good performance of the proposed multilevel inverter have been verified by the simulation results of a single-phase nine-level symmetric and 17-level asymmetric multilevel inverter and experimental results of a nine-level and 17-level inverters. Simulation and experimental results confirmed the validity and effectiveness performance of the proposed inverter.

In this study, a new topology of semi-cascaded multilevel inverter is proposed which is a proper alternative to be used in medium voltage applications. This structure consists of series connected sub-multilevel inverters blocks. The proposed topology is based on the connections of several cell units in an appropriate scheme with the help of six power switches. Compared to the traditional cascaded multilevel inverter, in suggested topology the number of switches, inverter cost and installation area are reduced significantly. Also, in comparison with semi-cascaded multilevel inverter, the proposed inverter works with lower total peak inverse voltage. The proposed inverter is able to be used as an asymmetrical inverter. To verify the operation and good performance of the proposed inverter the simulation and experimental results are obtained.

Recently applications of multilevel converters have been pointed out because of some advantages include high-quality output waveform, reduced harmonic distortion and lower electromagnetic interference. However, some drawbacks such as increased number of components like switches and dc power supplies and complex pulse width modulation control method are associated with these converters. In this study, a new cascade multilevel converter is introduced named 'cascade-multicell' converter. First, the basic constitutive of the proposed multilevel converter has been explained. Then, symmetric and asymmetric configurations are presented. The number of switches and gate driver circuits in the proposed structure are less than the conventional cascade converter. Therefore its output voltage levels will be increased. Also, the number of on-state switches is reduced in presented topology, and so the conductive losses will be reduced. The peak inverse voltage of the proposed converter is equal with the traditional cascade converter. Finally, simulation and experimental results are presented. The presented results show the validity and effectiveness of the proposed multilevel structure.

In this paper, an advanced configuration for symmetric multilevel voltage source inverter is proposed. The authority of the proposed inverter versus the conventional cascaded H-bridge inverter and the most recently introduced ones, is verified with provided comparisons. The proposed inverter is able to generate the desired voltage levels using a lower number of circuit devices including power semi-conductor switches and related gate driver circuits of switches. As a result, the total cost is considerably reduced and the control scheme gets simpler. Moreover, reduced amount of on-state switches in the suggested configuration decreases voltage drops. And power losses are diminished, as well. The given simulation results confirms the feasibility of the proposed configuration. Also, to approve the practicability of the proposed inverter, a prototype of the proposed topology has been implemented. Finally simulation and experimental results are compared with each other and the provided comparison shows that the obtained results are in good agreements.

Eliminating the specific harmonics especially low-order harmonics of the output voltage of 9-level inverter using SHE-PWM control scheme is investigated. Harmonic minimization is the intricate optimization problems because the nonlinear transcendental equations have multiple local optima. Increasing the degrees of freedom in the suggested method means that the number of switching angles increases. The suggested method is able to eliminate high number of undesired harmonics. As the number of switching angles increases, using either traditional iterative techniques or resultant theory method gets useless. In this paper to overcome this problem the imperialist competitive algorithm (ICA) is used. Also a DC-DC converter is used to enhance the SHE performance in the range for which the conventional SHE methods do not have any solution. Experimental and simulation results of a 9-level inverter show that the proposed method effectively minimizes a large number of particular harmonics so the total harmonics distortion of output voltage will be lower.